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[Qemu-ppc] [PULL 17/19] ppc/pnv: Fix fatal bug on 32-bit hosts
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 17/19] ppc/pnv: Fix fatal bug on 32-bit hosts |
Date: |
Tue, 15 Nov 2016 13:49:02 +1100 |
If the pnv machine type is compiled on a 32-bit host, the unsigned long
(host) type is 32-bit. This means that the hweight_long() used to
calculate the number of allowed cores only considers the low 32 bits of
the cores_mask variable, and can thus return 0 in some circumstances.
This corrects the bug.
Signed-off-by: David Gibson <address@hidden>
Suggested-by: Richard Henderson <address@hidden>
[clg: replaced hweight_long() by ctpop64() ]
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index e777958..9df7b25 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -620,7 +620,7 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error
**errp)
chip->cores_mask &= pcc->cores_mask;
/* now that we have a sane layout, let check the number of cores */
- cores_max = hweight_long(chip->cores_mask);
+ cores_max = ctpop64(chip->cores_mask);
if (chip->nr_cores > cores_max) {
error_setg(errp, "warning: too many cores for chip ! Limit is %d",
cores_max);
--
2.7.4
- [Qemu-ppc] [PULL 13/19] FU exceptions should carry a cause (IC), (continued)
- [Qemu-ppc] [PULL 13/19] FU exceptions should carry a cause (IC), David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 14/19] spapr-vty: Fix bad assert() statement, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 06/19] ppc/pnv: fix compile breakage on old gcc, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 11/19] target-ppc: Implement bcdctz. instruction, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 07/19] ppc: Remove some stub POWER6 models, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 02/19] target-ppc: add vrldnmi and vrlwmi instructions, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 05/19] powernv: CPU compatibility modes don't make sense for powernv, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 09/19] target-ppc: Implement bcdctn. instruction, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 18/19] tests: add XSCOM tests for the PowerNV machine, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 04/19] target-ppc: add vprtyb[w/d/q] instructions, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 17/19] ppc/pnv: Fix fatal bug on 32-bit hosts,
David Gibson <=
- [Qemu-ppc] [PULL 12/19] spapr: Fix migration of PCI host bridges from qemu-2.7, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 19/19] boot-serial-test: Add a test for the powernv machine, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 15/19] ppc/pnv: add a 'xscom_core_base' field to PnvChipClass, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 08/19] target-ppc: Implement bcdcfn. instruction, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 10/19] target-ppc: Implement bcdcfz. instruction, David Gibson, 2016/11/14
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/19] ppc-for-2.8 queue 20161115, Stefan Hajnoczi, 2016/11/15