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Re: [Qemu-ppc] [PATCH v2 4/4] target-ppc: Implement bcdctz. instruction
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v2 4/4] target-ppc: Implement bcdctz. instruction |
Date: |
Mon, 31 Oct 2016 13:34:47 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Fri, Oct 28, 2016 at 03:18:04PM -0200, Jose Ricardo Ziviani wrote:
> bcdctz. converts from BCD to Zoned numeric format. Zoned format uses
> a byte to represent a digit where the most significant nibble is 0x3
> or 0xf, depending on the preferred signal.
>
> Signed-off-by: Jose Ricardo Ziviani <address@hidden>
> ---
> target-ppc/helper.h | 1 +
> target-ppc/int_helper.c | 51
> +++++++++++++++++++++++++++++++++++++
> target-ppc/translate/vmx-impl.inc.c | 7 +++--
> 3 files changed, 57 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index a9ac28b..489a405 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -374,6 +374,7 @@ DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
> DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
> DEF_HELPER_2(bcdctn, i32, avr, avr)
> DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
> +DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
>
> DEF_HELPER_2(xsadddp, void, env, i32)
> DEF_HELPER_2(xssubdp, void, env, i32)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index 19e6a3a..518824e 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -2774,6 +2774,57 @@ uint32_t helper_bcdcfz(ppc_avr_t *r, ppc_avr_t *b,
> uint32_t ps)
>
> return cr;
> }
> +
> +uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
> +{
> + int i;
> + int j;
> + int cr = 0;
> + uint8_t digit = 0;
> + int sgnb = bcd_get_sgn(b);
> + int zone_lead = (ps) ? 0xF0 : 0x30;
> + int invalid = (sgnb == 0);
> + ppc_avr_t ret = { .u64 = { 0, 0 } };
> +
> + int eq_flag = (b->u64[HI_IDX] == 0) && ((b->u64[LO_IDX] >> 4) == 0);
> + int ox_flag = ((b->u64[HI_IDX] >> 4) != 0);
> +
> + for (i = 0, j = 1; i < 32; i += 2, j++) {
> + digit = bcd_get_digit(b, j, &invalid);
> +
> + if (unlikely(invalid)) {
> + break;
> + }
> +
> + ret.u8[BCD_DIG_BYTE(i)] = zone_lead + digit;
> + }
> +
> + if (ps) {
> + bcd_put_digit(&ret, (sgnb == 1) ? 0xC : 0xD, 1);
> + } else {
> + bcd_put_digit(&ret, (sgnb == 1) ? 0x3 : 0x7, 1);
> + }
> + bcd_put_digit(&ret, b->u8[BCD_DIG_BYTE(0)] >> 4, 0);
This last bcd_put_digit looks unneccessary - your loop above has
already put all the actual digits into the output, and writing the
sign nibble won't have overwritten that.
> +
> + if (!eq_flag) {
> + cr = (sgnb == 1) ? 1 << CRF_GT : 1 << CRF_LT;
> + } else {
> + cr = 1 << CRF_EQ;
> + }
> +
> + if (ox_flag) {
> + cr |= 1 << CRF_SO;
> + }
> +
> + if (unlikely(invalid)) {
> + cr = 1 << CRF_SO;
> + }
> +
> + *r = ret;
> +
> + return cr;
> +}
> +
> void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
> {
> int i;
> diff --git a/target-ppc/translate/vmx-impl.inc.c
> b/target-ppc/translate/vmx-impl.inc.c
> index 6e54437..a868740 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -992,6 +992,7 @@ GEN_BCD(bcdsub)
> GEN_BCD2(bcdcfn)
> GEN_BCD3(bcdctn)
> GEN_BCD2(bcdcfz)
> +GEN_BCD2(bcdctz)
>
> static void gen_xpnd04_1(DisasContext *ctx)
> {
> @@ -1001,7 +1002,8 @@ static void gen_xpnd04_1(DisasContext *ctx)
> case 2:
> break; /* bcdcfsq. */
> case 4:
> - break; /* bcdctz. */
> + gen_bcdctz(ctx);
> + break;
> case 5:
> gen_bcdctn(ctx);
> break;
> @@ -1026,7 +1028,8 @@ static void gen_xpnd04_2(DisasContext *ctx)
> case 2:
> break; /* bcdcfsq. */
> case 4:
> - break; /* bcdctz. */
> + gen_bcdctz(ctx);
> + break;
> case 6:
> gen_bcdcfz(ctx);
> break;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH v2 0/4] POWER9 TCG enablements - BCD functions part I, Jose Ricardo Ziviani, 2016/10/28
- [Qemu-ppc] [PATCH v2 1/4] target-ppc: Implement bcdcfn. instruction, Jose Ricardo Ziviani, 2016/10/28
- [Qemu-ppc] [PATCH v2 2/4] target-ppc: Implement bcdctn. instruction, Jose Ricardo Ziviani, 2016/10/28
- [Qemu-ppc] [PATCH v2 3/4] target-ppc: Implement bcdcfz. instruction, Jose Ricardo Ziviani, 2016/10/28
- [Qemu-ppc] [PATCH v2 4/4] target-ppc: Implement bcdctz. instruction, Jose Ricardo Ziviani, 2016/10/28
- Re: [Qemu-ppc] [PATCH v2 4/4] target-ppc: Implement bcdctz. instruction,
David Gibson <=
- Re: [Qemu-ppc] [PATCH v2 0/4] POWER9 TCG enablements - BCD functions part I, David Gibson, 2016/10/30