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Re: [Qemu-ppc] [PATCH v2 2/6] bitops: fix rol/ror when shift is zero
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v2 2/6] bitops: fix rol/ror when shift is zero |
Date: |
Thu, 27 Oct 2016 14:51:57 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Wed, Oct 26, 2016 at 08:20:10AM -0700, Richard Henderson wrote:
> On 10/25/2016 11:26 PM, Nikunj A Dadhania wrote:
> > All the variants for rol/ror have a bug in case where the shift == 0.
> > For example rol32, would generate:
> >
> > return (word << 0) | (word >> 32);
> >
> > Which though works, would be flagged as a runtime error on clang's
> > sanitizer.
> >
> > Suggested-by: Richard Henderson <address@hidden>
> > Signed-off-by: Nikunj A Dadhania <address@hidden>
> > ---
> > include/qemu/bitops.h | 16 ++++++++--------
> > 1 file changed, 8 insertions(+), 8 deletions(-)
>
> Reviewed-by: Richard Henderson <address@hidden>
This looks fine to me too, but I'm not sure if it should be going via
my tree or not.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-ppc] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions, Nikunj A Dadhania, 2016/10/26
[Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, Nikunj A Dadhania, 2016/10/26