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Re: [Qemu-ppc] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instruct
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions |
Date: |
Thu, 27 Oct 2016 14:39:15 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Wed, Oct 26, 2016 at 11:56:27AM +0530, Nikunj A Dadhania wrote:
> From: Bharata B Rao <address@hidden>
>
> vrldnm: Vector Rotate Left Doubleword then AND with Mask
> vrlwnm: Vector Rotate Left Word then AND with Mask
>
> Signed-off-by: Bharata B Rao <address@hidden>
> Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: David Gibson <address@hidden>
With the caveat that I'd like to see the previous patch it's based on
share, rather than duplicate the mask generation with translate.c
> ---
> disas/ppc.c | 2 ++
> target-ppc/helper.h | 2 ++
> target-ppc/int_helper.c | 14 ++++++++++----
> target-ppc/translate/vmx-impl.inc.c | 6 ++++++
> target-ppc/translate/vmx-ops.inc.c | 4 ++--
> 5 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/disas/ppc.c b/disas/ppc.c
> index 32f0d8d..bd05623 100644
> --- a/disas/ppc.c
> +++ b/disas/ppc.c
> @@ -2287,7 +2287,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
> { "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vrsqrtefp", VX(4, 330), VX_MASK, PPCVEC, { VD, VB } },
> { "vrldmi", VX(4, 197), VX_MASK, PPCVEC, { VD, VA, VB } },
> +{ "vrldnm", VX(4, 453), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vrlwmi", VX(4, 133), VX_MASK, PPCVEC, { VD, VA, VB} },
> +{ "vrlwnm", VX(4, 389), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB,
> VC } },
> { "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } },
> { "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } },
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 9fb8f0d..d6ee26e 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -327,6 +327,8 @@ DEF_HELPER_3(vrefp, void, env, avr, avr)
> DEF_HELPER_3(vrsqrtefp, void, env, avr, avr)
> DEF_HELPER_3(vrlwmi, void, avr, avr, avr)
> DEF_HELPER_3(vrldmi, void, avr, avr, avr)
> +DEF_HELPER_3(vrldnm, void, avr, avr, avr)
> +DEF_HELPER_3(vrlwnm, void, avr, avr, avr)
> DEF_HELPER_5(vmaddfp, void, env, avr, avr, avr, avr)
> DEF_HELPER_5(vnmsubfp, void, env, avr, avr, avr, avr)
> DEF_HELPER_3(vexptefp, void, env, avr, avr)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index b54cd7c..0fd92ed 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -1741,7 +1741,7 @@ static inline uint##size##_t
> mask_u##size(uint##size##_t start, \
> MASK(32, UINT32_MAX);
> MASK(64, UINT64_MAX);
>
> -#define VRLMI(name, size, element) \
> +#define VRLMI(name, size, element, insert) \
> void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> { \
> int i; \
> @@ -1756,12 +1756,18 @@ void helper_##name(ppc_avr_t *r, ppc_avr_t *a,
> ppc_avr_t *b) \
> begin = extract##size(src2, 16, 6); \
> rot_val = rol##size(src1, shift); \
> mask = mask_u##size(begin, end); \
> - r->element[i] = (rot_val & mask) | (src3 & ~mask); \
> + if (insert) { \
> + r->element[i] = (rot_val & mask) | (src3 & ~mask); \
> + } else { \
> + r->element[i] = (rot_val & mask); \
> + } \
> } \
> }
>
> -VRLMI(vrldmi, 64, u64);
> -VRLMI(vrlwmi, 32, u32);
> +VRLMI(vrldmi, 64, u64, 1);
> +VRLMI(vrlwmi, 32, u32, 1);
> +VRLMI(vrldnm, 64, u64, 0);
> +VRLMI(vrlwnm, 32, u32, 0);
>
> void helper_vsel(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
> ppc_avr_t *c)
> diff --git a/target-ppc/translate/vmx-impl.inc.c
> b/target-ppc/translate/vmx-impl.inc.c
> index fdfbd6a..500c43f 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -442,6 +442,9 @@ GEN_VXFORM(vmulesw, 4, 14);
> GEN_VXFORM(vslb, 2, 4);
> GEN_VXFORM(vslh, 2, 5);
> GEN_VXFORM(vslw, 2, 6);
> +GEN_VXFORM(vrlwnm, 2, 6);
> +GEN_VXFORM_DUAL(vslw, PPC_ALTIVEC, PPC_NONE, \
> + vrlwnm, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsld, 2, 23);
> GEN_VXFORM(vsrb, 2, 8);
> GEN_VXFORM(vsrh, 2, 9);
> @@ -496,6 +499,9 @@ GEN_VXFORM(vrldmi, 2, 3);
> GEN_VXFORM_DUAL(vrld, PPC_NONE, PPC2_ALTIVEC_207, \
> vrldmi, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsl, 2, 7);
> +GEN_VXFORM(vrldnm, 2, 7);
> +GEN_VXFORM_DUAL(vsl, PPC_ALTIVEC, PPC_NONE, \
> + vrldnm, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM(vsr, 2, 11);
> GEN_VXFORM_ENV(vpkuhum, 7, 0);
> GEN_VXFORM_ENV(vpkuwum, 7, 1);
> diff --git a/target-ppc/translate/vmx-ops.inc.c
> b/target-ppc/translate/vmx-ops.inc.c
> index 76b3593..a5ad4d4 100644
> --- a/target-ppc/translate/vmx-ops.inc.c
> +++ b/target-ppc/translate/vmx-ops.inc.c
> @@ -107,7 +107,7 @@ GEN_VXFORM(vmulesh, 4, 13),
> GEN_VXFORM_207(vmulesw, 4, 14),
> GEN_VXFORM(vslb, 2, 4),
> GEN_VXFORM(vslh, 2, 5),
> -GEN_VXFORM(vslw, 2, 6),
> +GEN_VXFORM_DUAL(vslw, vrlwnm, 2, 6, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM_207(vsld, 2, 23),
> GEN_VXFORM(vsrb, 2, 8),
> GEN_VXFORM(vsrh, 2, 9),
> @@ -145,7 +145,7 @@ GEN_VXFORM(vrlb, 2, 0),
> GEN_VXFORM(vrlh, 2, 1),
> GEN_VXFORM_DUAL(vrlw, vrlwmi, 2, 2, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM_DUAL(vrld, vrldmi, 2, 3, PPC_NONE, PPC2_ALTIVEC_207),
> -GEN_VXFORM(vsl, 2, 7),
> +GEN_VXFORM_DUAL(vsl, vrldnm, 2, 7, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM(vsr, 2, 11),
> GEN_VXFORM(vpkuhum, 7, 0),
> GEN_VXFORM(vpkuwum, 7, 1),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-ppc] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions, Nikunj A Dadhania, 2016/10/26
- Re: [Qemu-ppc] [PATCH v2 4/6] target-ppc: add vrldnm and vrlwnm instructions,
David Gibson <=
[Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, Nikunj A Dadhania, 2016/10/26
- Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, David Gibson, 2016/10/27
- Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, Richard Henderson, 2016/10/27
- Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, Nikunj A Dadhania, 2016/10/27
- Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, Richard Henderson, 2016/10/27
- Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, David Gibson, 2016/10/27
Re: [Qemu-ppc] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions, David Gibson, 2016/10/27
[Qemu-ppc] [PATCH v2 6/6] target-ppc: Add xvcmpnesp, xvcmpnedp instructions, Nikunj A Dadhania, 2016/10/26