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Re: [Qemu-ppc] [PATCH 1/4] target-ppc: implement vexts[bh]2w and vexts[b
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-ppc] [PATCH 1/4] target-ppc: implement vexts[bh]2w and vexts[bhw]2d |
Date: |
Mon, 10 Oct 2016 10:35:50 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> On 10/07/2016 01:57 PM, Nikunj A Dadhania wrote:
>> +VEXT_SIGNED(vextsb2w, s32, UINT8_MAX, char, int32_t)
>> +VEXT_SIGNED(vextsb2d, s64, UINT8_MAX, char, int64_t)
>
> char has target-dependent sign. Use int8_t.
Sure. will change.
Regards
Nikunj
- [Qemu-ppc] [PATCH 0/4] POWER9 TCG enablements - part6, Nikunj A Dadhania, 2016/10/07
- [Qemu-ppc] [PATCH 2/4] target-ppc: implement vnegw/d instructions, Nikunj A Dadhania, 2016/10/07
- [Qemu-ppc] [PATCH 1/4] target-ppc: implement vexts[bh]2w and vexts[bhw]2d, Nikunj A Dadhania, 2016/10/07
- [Qemu-ppc] [PATCH 3/4] target-ppc: implement xxbr[qdwh] instruction, Nikunj A Dadhania, 2016/10/07
- [Qemu-ppc] [PATCH 4/4] target-ppc: Add xscmp[eq, gt, ge, ne]dp instructions, Nikunj A Dadhania, 2016/10/07
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 0/4] POWER9 TCG enablements - part6, no-reply, 2016/10/10