[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [Qemu-devel] [V6 PATCH 18/18] target-ppc: Scalar Non-Sign
From: |
Richard Henderson |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [V6 PATCH 18/18] target-ppc: Scalar Non-Signalling Conversions |
Date: |
Fri, 10 Jan 2014 13:42:16 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
On 01/10/2014 11:08 AM, Tom Musta wrote:
> This patch adds the non-signalling scalar conversion instructions:
>
> - VSX Scalar Convert Single Precision to Double Precision
> Non-Signalling (xscvspdpn)
> - VSX Scalar Convert Double Precision to Single Precision
> Non-Signalling (xscvdpspn)
>
> Signed-off-by: Tom Musta <address@hidden>
> ---
> V6: New.
>
> target-ppc/fpu_helper.c | 19 +++++++++++++++++++
> target-ppc/helper.h | 2 ++
> target-ppc/translate.c | 4 ++++
> 3 files changed, 25 insertions(+), 0 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
Of course, this also deserves the same cleanup that all of the other VSX
scalars ought to get -- reorg to be more like regular FP, with data passed by
value.
r~
- Re: [Qemu-ppc] [Qemu-devel] [V6 PATCH 15/18] target-ppc: Move To/From VSR Instructions, (continued)
[Qemu-ppc] [V6 PATCH 16/18] target-ppc: Floating Merge Word Instructions, Tom Musta, 2014/01/10
[Qemu-ppc] [V6 PATCH 10/18] target-ppc: VSX Stage 4: Add xssqrtsp, Tom Musta, 2014/01/10
[Qemu-ppc] [V6 PATCH 11/18] target-ppc: VSX Stage 4: add xsrsqrtesp, Tom Musta, 2014/01/10
[Qemu-ppc] [V6 PATCH 17/18] target-ppc: Scalar Round to Single Precision, Tom Musta, 2014/01/10
[Qemu-ppc] [V6 PATCH 18/18] target-ppc: Scalar Non-Signalling Conversions, Tom Musta, 2014/01/10
- Re: [Qemu-ppc] [Qemu-devel] [V6 PATCH 18/18] target-ppc: Scalar Non-Signalling Conversions,
Richard Henderson <=