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Re: [PATCH 00/57] target/arm: Convert a64 advsimd to decodetree (part 1)
From: |
Peter Maydell |
Subject: |
Re: [PATCH 00/57] target/arm: Convert a64 advsimd to decodetree (part 1) |
Date: |
Thu, 23 May 2024 15:19:20 +0100 |
On Mon, 6 May 2024 at 02:04, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Based-on: 20240424170908.759043-1-richard.henderson@linaro.org
> ("[PATCH 0/5] tcg: Misc improvements")
>
> In the process, convert more code to gvec as well -- I will need
> the gvec code for implementing SME2. I guess this is about 1/3
> of the job done, but there's no reason to wait until the patch
> set is completely unwieldy.
>
I've applied patches 1-29 to target-arm.next (with the
FMULX decode line fixed). I plan to continue looking at
the second half of the patchset, but I want to get a
target-arm pullreq out today before the long-long-weekend.
thanks
-- PMM
- Re: [PATCH 57/57] target/arm: Convert SQDMULH, SQRDMULH to decodetree, (continued)
- [PATCH 54/57] target/arm: Convert MUL, PMUL to decodetree, Richard Henderson, 2024/05/05
- [PATCH 51/57] target/arm: Convert SRHADD, URHADD to decodetree, Richard Henderson, 2024/05/05
- [PATCH 41/57] target/arm: Convert SQRSHL and UQRSHL (register) to gvec, Richard Henderson, 2024/05/05
- [PATCH 45/57] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32,i64}, Richard Henderson, 2024/05/05
- [PATCH 52/57] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree, Richard Henderson, 2024/05/05
- [PATCH 56/57] target/arm: Tidy SQDMULH, SQRDMULH (vector), Richard Henderson, 2024/05/05
- [PATCH 50/57] target/arm: Convert SRHADD, URHADD to gvec, Richard Henderson, 2024/05/05
- [PATCH 53/57] target/arm: Convert SABA, SABD, UABA, UABD to decodetree, Richard Henderson, 2024/05/05
- [PATCH 55/57] target/arm: Convert MLA, MLS to decodetree, Richard Henderson, 2024/05/05
- Re: [PATCH 00/57] target/arm: Convert a64 advsimd to decodetree (part 1),
Peter Maydell <=