Bit 63 in a Table descriptor is only the NSTable bit for stage 1
translations; in stage 2 it is RES0. We were incorrectly looking at
it all the time.
This causes problems if:
* the stage 2 table descriptor was incorrectly setting the RES0 bit
* we are doing a stage 2 translation in Secure address space for
a NonSecure stage 1 regime -- in this case we would incorrectly
do an immediate downgrade to NonSecure
A bug elsewhere in the code currently prevents us from getting
to the second situation, but when we fix that it will be possible.
Cc:qemu-stable@nongnu.org
Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
target/arm/ptw.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)