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[PATCH v7 04/12] target/riscv: add PRIV_VERSION_LATEST
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From: |
Daniel Henrique Barboza |
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Subject: |
[PATCH v7 04/12] target/riscv: add PRIV_VERSION_LATEST |
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Date: |
Mon, 17 Apr 2023 11:00:05 -0300 |
All these generic CPUs are using the latest priv available, at this
moment PRIV_VERSION_1_12_0:
- riscv_any_cpu_init()
- rv32_base_cpu_init()
- rv64_base_cpu_init()
- rv128_base_cpu_init()
Create a new PRIV_VERSION_LATEST enum and use it in those cases. I'll
make it easier to update everything at once when a new priv version is
available.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
---
target/riscv/cpu.c | 8 ++++----
target/riscv/cpu.h | 2 ++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index bec60fe585..dd35cf378f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -345,7 +345,7 @@ static void riscv_any_cpu_init(Object *obj)
VM_1_10_SV32 : VM_1_10_SV57);
#endif
- env->priv_ver = PRIV_VERSION_1_12_0;
+ env->priv_ver = PRIV_VERSION_LATEST;
}
#if defined(TARGET_RISCV64)
@@ -356,7 +356,7 @@ static void rv64_base_cpu_init(Object *obj)
set_misa(env, MXL_RV64, 0);
riscv_cpu_add_user_properties(obj);
/* Set latest version of privileged specification */
- env->priv_ver = PRIV_VERSION_1_12_0;
+ env->priv_ver = PRIV_VERSION_LATEST;
#ifndef CONFIG_USER_ONLY
set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
#endif
@@ -425,7 +425,7 @@ static void rv128_base_cpu_init(Object *obj)
set_misa(env, MXL_RV128, 0);
riscv_cpu_add_user_properties(obj);
/* Set latest version of privileged specification */
- env->priv_ver = PRIV_VERSION_1_12_0;
+ env->priv_ver = PRIV_VERSION_LATEST;
#ifndef CONFIG_USER_ONLY
set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
#endif
@@ -438,7 +438,7 @@ static void rv32_base_cpu_init(Object *obj)
set_misa(env, MXL_RV32, 0);
riscv_cpu_add_user_properties(obj);
/* Set latest version of privileged specification */
- env->priv_ver = PRIV_VERSION_1_12_0;
+ env->priv_ver = PRIV_VERSION_LATEST;
#ifndef CONFIG_USER_ONLY
set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV32);
#endif
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index de7e43126a..15423585d0 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -61,6 +61,8 @@ enum {
PRIV_VERSION_1_10_0 = 0,
PRIV_VERSION_1_11_0,
PRIV_VERSION_1_12_0,
+
+ PRIV_VERSION_LATEST = PRIV_VERSION_1_12_0,
};
#define VEXT_VERSION_1_00_0 0x00010000
--
2.39.2
- [PATCH v7 00/12] target/riscv: rework CPU extensions validation, Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 01/12] target/riscv/cpu.c: add riscv_cpu_validate_v(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 03/12] target/riscv/cpu.c: remove set_priv_version(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 02/12] target/riscv/cpu.c: remove set_vext_version(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 04/12] target/riscv: add PRIV_VERSION_LATEST,
Daniel Henrique Barboza <=
- [PATCH v7 05/12] target/riscv: Mask the implicitly enabled extensions in isa_string based on priv version, Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 06/12] target/riscv: Update check for Zca/Zcf/Zcd, Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 07/12] target/riscv/cpu.c: add priv_spec validate/disable_exts helpers, Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 11/12] target/riscv: rework write_misa(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 08/12] target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 09/12] target/riscv/cpu.c: validate extensions before riscv_timer_init(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 10/12] target/riscv/cpu.c: remove cfg setup from riscv_cpu_init(), Daniel Henrique Barboza, 2023/04/17
- [PATCH v7 12/12] target/riscv: forbid write_misa() for static CPUs, Daniel Henrique Barboza, 2023/04/17