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[PATCH v4 18/20] target/riscv: remove cfg.ext_g setup from rv64_thead_c9
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v4 18/20] target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init() |
Date: |
Thu, 6 Apr 2023 15:03:49 -0300 |
This CPU is enabling G via cfg.ext_g and, at the same time, setting
IMAFD in set_misa() and cfg.ext_icsr.
riscv_cpu_validate_set_extensions() is already doing that, so there's no
need for cpu_init() setups to worry about setting G and its extensions.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 1ecb82bb5d..b005bcb786 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -403,11 +403,10 @@ static void rv64_thead_c906_cpu_init(Object *obj)
CPURISCVState *env = &RISCV_CPU(obj)->env;
RISCVCPU *cpu = RISCV_CPU(obj);
- set_misa(env, MXL_RV64, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
+ set_misa(env, MXL_RV64, RVC | RVS | RVU);
set_priv_version(env, PRIV_VERSION_1_11_0);
cpu->cfg.ext_g = true;
- cpu->cfg.ext_icsr = true;
cpu->cfg.ext_zfh = true;
cpu->cfg.mmu = true;
cpu->cfg.ext_xtheadba = true;
--
2.39.2
- [PATCH v4 07/20] target/riscv: remove cpu->cfg.ext_d, (continued)
- [PATCH v4 07/20] target/riscv: remove cpu->cfg.ext_d, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 08/20] target/riscv: remove cpu->cfg.ext_f, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 09/20] target/riscv: remove cpu->cfg.ext_i, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 10/20] target/riscv: remove cpu->cfg.ext_e, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 11/20] target/riscv: remove cpu->cfg.ext_m, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 12/20] target/riscv: remove cpu->cfg.ext_s, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 13/20] target/riscv: remove cpu->cfg.ext_u, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 14/20] target/riscv: remove cpu->cfg.ext_h, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 15/20] target/riscv: remove cpu->cfg.ext_j, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 16/20] target/riscv: remove cpu->cfg.ext_v, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 18/20] target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init(),
Daniel Henrique Barboza <=
- [PATCH v4 19/20] target/riscv: add RVG and remove cpu->cfg.ext_g, Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 17/20] target/riscv: remove riscv_cpu_sync_misa_cfg(), Daniel Henrique Barboza, 2023/04/06
- [PATCH v4 20/20] target/riscv/cpu.c: redesign register_cpu_props(), Daniel Henrique Barboza, 2023/04/06
- Re: [PATCH v4 00/20] remove MISA ext_N flags from cpu->cfg, Alistair Francis, 2023/04/10