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Re: [PATCH v1] target/loongarch: Implement Chip Configuraiton Version Re


From: Richard Henderson
Subject: Re: [PATCH v1] target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
Date: Mon, 27 Feb 2023 09:37:57 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1

On 2/26/23 21:10, Song Gao wrote:
According to the 3A5000 manual 4.1 implement Chip Configuration
Version Register(0x0000). The manual does not state that 0x0018 is
reserved for the vendor name and 0x0028 is reserved for the chip name.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
  target/loongarch/cpu.c | 2 ++
  target/loongarch/cpu.h | 3 +++
  2 files changed, 5 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 290ab4d526..d1c803c9d6 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -545,6 +545,8 @@ static void loongarch_qemu_write(void *opaque, hwaddr addr,
  static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)
  {
      switch (addr) {
+    case VERSION_REG:
+        return 0x11ULL;

This one is back in manual v1.03.
I can't find manual 4.1?

+#define VENDOR_RESERVED_REG     0x18
+#define CPUNAME_RESERVED_REG    0x28

Since these are unused, perhaps omit them?

Either way,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~



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