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[PATCH v5 1/8] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
From: |
Jonathan Cameron |
Subject: |
[PATCH v5 1/8] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register |
Date: |
Tue, 21 Feb 2023 15:21:38 +0000 |
This register in AER should be both writeable and should
have a default value with a couple of the errors masked
including the Uncorrectable Internal Error used by CXL for
it's error reporting.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/pci/pcie_aer.c | 4 ++++
include/hw/pci/pcie_regs.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 9a19be44ae..909e027d99 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -112,6 +112,10 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver,
uint16_t offset,
pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
PCI_ERR_UNC_SUPPORTED);
+ pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
+ PCI_ERR_UNC_MASK_DEFAULT);
+ pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
+ PCI_ERR_UNC_SUPPORTED);
pci_set_long(dev->config + offset + PCI_ERR_UNCOR_SEVER,
PCI_ERR_UNC_SEVERITY_DEFAULT);
diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
index 963dc2e170..6ec4785448 100644
--- a/include/hw/pci/pcie_regs.h
+++ b/include/hw/pci/pcie_regs.h
@@ -155,6 +155,9 @@ typedef enum PCIExpLinkWidth {
PCI_ERR_UNC_ATOP_EBLOCKED | \
PCI_ERR_UNC_TLP_PRF_BLOCKED)
+#define PCI_ERR_UNC_MASK_DEFAULT (PCI_ERR_UNC_INTN | \
+ PCI_ERR_UNC_TLP_PRF_BLOCKED)
+
#define PCI_ERR_UNC_SEVERITY_DEFAULT (PCI_ERR_UNC_DLP | \
PCI_ERR_UNC_SDN | \
PCI_ERR_UNC_FCP | \
--
2.37.2
- [PATCH v5 0/8] hw/cxl: RAS error emulation and injection, Jonathan Cameron, 2023/02/21
- [PATCH v5 1/8] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register,
Jonathan Cameron <=
- [PATCH v5 2/8] hw/pci/aer: Add missing routing for AER errors, Jonathan Cameron, 2023/02/21
- [PATCH v5 3/8] hw/pci-bridge/cxl_root_port: Wire up AER, Jonathan Cameron, 2023/02/21
- [PATCH v5 4/8] hw/pci-bridge/cxl_root_port: Wire up MSI, Jonathan Cameron, 2023/02/21
- [PATCH v5 5/8] hw/mem/cxl-type3: Add AER extended capability, Jonathan Cameron, 2023/02/21
- [PATCH v5 6/8] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks, Jonathan Cameron, 2023/02/21
- [PATCH v5 7/8] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use., Jonathan Cameron, 2023/02/21
- [PATCH v5 8/8] hw/mem/cxl_type3: Add CXL RAS Error Injection Support., Jonathan Cameron, 2023/02/21