Re: [PATCH v2 1/4] util/cacheflush: fix cache on windows-arm64

[Peter Maydell]

On Thu, 16 Feb 2023 at 13:49, Pierrick Bouvier
<pierrick.bouvier@linaro.org> wrote:
>
> ctr_el0 access is privileged on this platform and fails as an illegal
> instruction.
>
> Windows does not offer a way to flush data cache from userspace, and
> only FlushInstructionCache is available in Windows API.
>
> The generic implementation of flush_idcache_range uses,
> __builtin___clear_cache, which already use the FlushInstructionCache
> function. So we rely on that.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
>  util/cacheflush.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/util/cacheflush.c b/util/cacheflush.c
> index 2c2c73e085..0a0acd70fa 100644
> --- a/util/cacheflush.c
> +++ b/util/cacheflush.c
> @@ -121,8 +121,10 @@ static void sys_cache_info(int *isize, int *dsize)
>  static bool have_coherent_icache;
>  #endif
>
> -#if defined(__aarch64__) && !defined(CONFIG_DARWIN)
> -/* Apple does not expose CTR_EL0, so we must use system interfaces. */
> +#if defined(__aarch64__) && !defined(CONFIG_DARWIN) && !defined(CONFIG_WIN32)
> +/* Apple does not expose CTR_EL0, so we must use system interfaces.
> + * Windows neither, but we use a generic implementation of 
> flush_idcache_range
> + * in this case. */

QEMU multiline comment syntax requires the /* and */ to be
on lines of their own (here and in your other comment).

thanks
-- PMM