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[PULL 24/30] target/arm: Move PC alignment check
From: |
Peter Maydell |
Subject: |
[PULL 24/30] target/arm: Move PC alignment check |
Date: |
Thu, 16 Feb 2023 17:11:17 +0000 |
From: Fabiano Rosas <farosas@suse.de>
Move this earlier to make the next patch diff cleaner. While here
update the comment slightly to not give the impression that the
misalignment affects only TCG.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/machine.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 5f261526525..b4c3850570c 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -839,6 +839,15 @@ static int cpu_post_load(void *opaque, int version_id)
}
}
+ /*
+ * Misaligned thumb pc is architecturally impossible. Fail the
+ * incoming migration. For TCG it would trigger the assert in
+ * thumb_tr_translate_insn().
+ */
+ if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
+ return -1;
+ }
+
hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu);
@@ -856,15 +865,6 @@ static int cpu_post_load(void *opaque, int version_id)
}
}
- /*
- * Misaligned thumb pc is architecturally impossible.
- * We have an assert in thumb_tr_translate_insn to verify this.
- * Fail an incoming migrate to avoid this assert.
- */
- if (!is_a64(env) && env->thumb && (env->regs[15] & 1)) {
- return -1;
- }
-
if (!kvm_enabled()) {
pmu_op_finish(&cpu->env);
}
--
2.34.1
- [PULL 18/30] hw/arm: Attach PSPI module to NPCM7XX SoC, (continued)
- [PULL 18/30] hw/arm: Attach PSPI module to NPCM7XX SoC, Peter Maydell, 2023/02/16
- [PULL 17/30] hw/ssi: Add Nuvoton PSPI Module, Peter Maydell, 2023/02/16
- [PULL 19/30] hw/arm/smmu-common: Support 64-bit addresses, Peter Maydell, 2023/02/16
- [PULL 20/30] hw/arm/smmu-common: Fix TTB1 handling, Peter Maydell, 2023/02/16
- [PULL 21/30] target/arm: rename handle_semihosting to tcg_handle_semihosting, Peter Maydell, 2023/02/16
- [PULL 22/30] target/arm: wrap psci call with tcg_enabled, Peter Maydell, 2023/02/16
- [PULL 23/30] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Peter Maydell, 2023/02/16
- [PULL 25/30] target/arm: Move cpregs code out of cpu.h, Peter Maydell, 2023/02/16
- [PULL 26/30] tests/avocado: Skip tests that require a missing accelerator, Peter Maydell, 2023/02/16
- [PULL 28/30] target/arm: Use "max" as default cpu for the virt machine with KVM, Peter Maydell, 2023/02/16
- [PULL 24/30] target/arm: Move PC alignment check,
Peter Maydell <=
- [PULL 27/30] tests/avocado: Tag TCG tests with accel:tcg, Peter Maydell, 2023/02/16
- [PULL 29/30] tests/qtest: arm-cpu-features: Match tests to required accelerators, Peter Maydell, 2023/02/16
- [PULL 30/30] tests/qtest: Restrict tpm-tis-devices-{swtpm}-test to CONFIG_TCG, Peter Maydell, 2023/02/16
- Re: [PULL 00/30] target-arm queue, Peter Maydell, 2023/02/20