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[PATCH v2 01/14] target/riscv: Fix the relationship between Zfhmin and Z
From: |
Weiwei Li |
Subject: |
[PATCH v2 01/14] target/riscv: Fix the relationship between Zfhmin and Zfh |
Date: |
Wed, 15 Feb 2023 10:05:26 +0800 |
Zfhmin is part of Zfh, so Zfhmin will be enabled when Zfh is enabled.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 0dd2f0c753..eb0cd12a6a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -729,7 +729,11 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU
*cpu, Error **errp)
return;
}
- if ((cpu->cfg.ext_zfh || cpu->cfg.ext_zfhmin) && !cpu->cfg.ext_f) {
+ if (cpu->cfg.ext_zfh) {
+ cpu->cfg.ext_zfhmin = true;
+ }
+
+ if (cpu->cfg.ext_zfhmin && !cpu->cfg.ext_f) {
error_setg(errp, "Zfh/Zfhmin extensions require F extension");
return;
}
--
2.25.1
- [PATCH v2 00/14] target/riscv: Some updates to float point related extensions, Weiwei Li, 2023/02/14
- [PATCH v2 03/14] target/riscv: Simplify the check for Zfhmin and Zhinxmin, Weiwei Li, 2023/02/14
- [PATCH v2 05/14] target/riscv: Fix relationship between V, Zve*, F and D, Weiwei Li, 2023/02/14
- [PATCH v2 04/14] target/riscv: Add cfg properties for Zv* extensions, Weiwei Li, 2023/02/14
- [PATCH v2 10/14] target/riscv: Remove rebundunt check for zve32f and zve64f, Weiwei Li, 2023/02/14
- [PATCH v2 01/14] target/riscv: Fix the relationship between Zfhmin and Zfh,
Weiwei Li <=
- [PATCH v2 02/14] target/riscv: Fix the relationship between Zhinxmin and Zhinx, Weiwei Li, 2023/02/14
- [PATCH v2 07/14] target/riscv: Indent fixes in cpu.c, Weiwei Li, 2023/02/14
- [PATCH v2 14/14] target/riscv: Expose properties for Zv* extensions, Weiwei Li, 2023/02/14
- [PATCH v2 06/14] target/riscv: Add propertie check for Zvfh{min} extensions, Weiwei Li, 2023/02/14
- [PATCH v2 11/14] target/riscv: Add support for Zvfh/zvfhmin extensions, Weiwei Li, 2023/02/14
- [PATCH v2 09/14] target/riscv: Replace check for F/D to Zve32f/Zve64d in trans_rvv.c.inc, Weiwei Li, 2023/02/14
- [PATCH v2 12/14] target/riscv: Fix check for vector load/store instructions when EEW=64, Weiwei Li, 2023/02/14
- [PATCH v2 13/14] target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc, Weiwei Li, 2023/02/14
- [PATCH v2 08/14] target/riscv: Simplify check for Zve32f and Zve64f, Weiwei Li, 2023/02/14