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From: | Richard Henderson |
Subject: | Re: [PATCH 1/4] util/cacheflush: fix illegal instruction on windows-arm64 |
Date: | Tue, 14 Feb 2023 07:02:12 -1000 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 |
On 2/14/23 06:44, Peter Maydell wrote:
This will cause us to not use the generic aarch64 flush_idcache_range(), which uses DC CVAU and IC IVAU. Does that not work on Windows? If it doesn't then I think the ifdeffery would be more clearly structured as #elif defined(__aarch64__) ifdef CONFIG_DARWIN [macos implementation of flush_idcache_range] #elif defined(CONFIG_WIN32) /* Explanation here of why the generic version doesn't work */ #else /* generic version */ #endif #elif defined(__mips__)
More specifically, there *must* be a replacement, or TCG will not work. It appears as if FlushInstructionCache is the right syscall on windows.I cannot find documentation for a data cache flush. But until there is also a way to allocate split w^x memory regions (tcg/region.c, alloc_code_gen_buffer_splitwx), you need not worry about that. You could reasonably assert(rx == rw) there.
r~
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