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[PATCH v2 02/11] target/arm: Simplify arm_v7m_mmu_idx_for_secstate() for
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 02/11] target/arm: Simplify arm_v7m_mmu_idx_for_secstate() for user emulation |
Date: |
Mon, 6 Feb 2023 23:34:53 +0100 |
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/m_helper.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index e7e746ea18..76239c9abe 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -150,7 +150,12 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr,
uint32_t op)
return 0;
}
-#else
+ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
+{
+ return ARMMMUIdx_MUser;
+}
+
+#else /* !CONFIG_USER_ONLY */
/*
* What kind of stack write are we doing? This affects how exceptions
@@ -2854,8 +2859,6 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr,
uint32_t op)
return tt_resp;
}
-#endif /* !CONFIG_USER_ONLY */
-
ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env,
bool secstate, bool priv, bool negpri)
{
@@ -2892,3 +2895,5 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,
bool secstate)
return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv);
}
+
+#endif /* !CONFIG_USER_ONLY */
--
2.38.1
- [PATCH v2 00/11] target/arm: Housekeeping around NVIC, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 03/11] target/arm: Reduce arm_v7m_mmu_idx_[all/for_secstate_and_priv]() scope, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 04/11] target/arm: Constify ID_PFR1 on user emulation, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 05/11] target/arm: Convert CPUARMState::eabi to boolean, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 01/11] hw/intc/armv7m_nvic: Use OBJECT_DECLARE_SIMPLE_TYPE() macro, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 02/11] target/arm: Simplify arm_v7m_mmu_idx_for_secstate() for user emulation,
Philippe Mathieu-Daudé <=
- [PATCH v2 06/11] target/arm: Avoid resetting CPUARMState::eabi field, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 07/11] target/arm: Restrict CPUARMState::gicv3state to sysemu, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 08/11] target/arm: Restrict CPUARMState::arm_boot_info to sysemu, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 09/11] target/arm: Restrict CPUARMState::nvic to sysemu, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 10/11] target/arm: Store CPUARMState::nvic as NVICState*, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH v2 11/11] target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h', Philippe Mathieu-Daudé, 2023/02/06
- Re: [PATCH v2 00/11] target/arm: Housekeeping around NVIC, Peter Maydell, 2023/02/10