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[PATCH v4 03/10] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_C
From: |
Jonathan Cameron |
Subject: |
[PATCH v4 03/10] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL |
Date: |
Mon, 6 Feb 2023 17:28:09 +0000 |
From: Gregory Price <gourry.memverge@gmail.com>
Current code sets to STORAGE_EXPRESS and then overrides it.
Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Gregory Price <gregory.price@memverge.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/mem/cxl_type3.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 252822bd82..217a5e639b 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -408,7 +408,6 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
}
pci_config_set_prog_interface(pci_conf, 0x10);
- pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_CXL);
pcie_endpoint_cap_init(pci_dev, 0x80);
if (ct3d->sn != UI64_NULL) {
@@ -627,7 +626,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
pc->realize = ct3_realize;
pc->exit = ct3_exit;
- pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
+ pc->class_id = PCI_CLASS_MEMORY_CXL;
pc->vendor_id = PCI_VENDOR_ID_INTEL;
pc->device_id = 0xd93; /* LVF for now */
pc->revision = 1;
--
2.37.2
[PATCH v4 03/10] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL,
Jonathan Cameron <=
[PATCH v4 04/10] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition, Jonathan Cameron, 2023/02/06
[PATCH v4 05/10] tests/acpi: Allow update of q35/DSDT.cxl, Jonathan Cameron, 2023/02/06
[PATCH v4 06/10] hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge, Jonathan Cameron, 2023/02/06
[PATCH v4 07/10] tests: acpi: Update q35/DSDT.cxl for removed duplicate UID, Jonathan Cameron, 2023/02/06
[PATCH v4 08/10] qemu/bswap: Add const_le64(), Jonathan Cameron, 2023/02/06