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RE: [PATCH v3 11/11] Hexagon (target/hexagon) Use direct block chaining
From: |
Taylor Simpson |
Subject: |
RE: [PATCH v3 11/11] Hexagon (target/hexagon) Use direct block chaining for tight loops |
Date: |
Sun, 6 Nov 2022 21:52:16 +0000 |
> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Friday, November 4, 2022 8:44 PM
> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> Cc: philmd@linaro.org; ale@rev.ng; anjo@rev.ng; Brian Cain
> <bcain@quicinc.com>; Matheus Bernardino (QUIC)
> <quic_mathbern@quicinc.com>
> Subject: Re: [PATCH v3 11/11] Hexagon (target/hexagon) Use direct block
> chaining for tight loops
>
> On 11/5/22 06:26, Taylor Simpson wrote:
> > Direct block chaining is documented here
> > https://qemu.readthedocs.io/en/latest/devel/tcg.html#direct-block-chai
> > ning
> >
> > Hexagon inner loops end with the endloop0 instruction To go back to
> > the beginning of the loop, this instructions writes to PC from
> > register SA0 (start address 0). To use direct block chaining, we have
> > to assign PC with a constant value. So, we specialize the code
> > generation when the start of the translation block is equal to SA0.
> >
> > When this is the case, we defer the compare/branch from endloop0 to
> > gen_end_tb. When this is done, we can assign the start address of the
> > TB to PC.
> >
> > Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> > ---
> > target/hexagon/cpu.h | 17 ++++++++----
> > target/hexagon/gen_tcg.h | 3 ++
> > target/hexagon/translate.h | 1 +
> > target/hexagon/genptr.c | 57
> ++++++++++++++++++++++++++++++++++++++
> > target/hexagon/translate.c | 34 +++++++++++++++++++++++
> > 5 files changed, 107 insertions(+), 5 deletions(-)
> >
> > diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index
> > ff8c26272d..5260e0f127 100644
> > --- a/target/hexagon/cpu.h
> > +++ b/target/hexagon/cpu.h
> > @@ -152,16 +152,23 @@ struct ArchCPU {
> >
> > #include "cpu_bits.h"
> >
> > +typedef union {
> > + uint32_t i;
> > + struct {
> > + bool is_tight_loop:1;
> > + };
> > +} HexStateFlags;
>
> I don't see this as an improvement on manual flags handling, as it makes the
> flags value be dependent on host bit-field ordering. This makes it more
> difficult to compare traces across hosts.
I coded this originally with manual handling but decided this would be easier
to read/understand/maintain - especially as we add more flags and some have
more than 1 bit.
I haven't noticed the flags in any of the logs. Where are they printed?
>
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
- Re: [PATCH v3 07/11] Hexagon (target/hexagon) Add overrides for direct call instructions, (continued)
- [PATCH v3 04/11] Hexagon (target/hexagon) Only use branch_taken when packet has multi cof, Taylor Simpson, 2022/11/04
- [PATCH v3 08/11] Hexagon (target/hexagon) Add overrides for compound compare and jump, Taylor Simpson, 2022/11/04
- [PATCH v3 09/11] Hexagon (target/hexagon) Add overrides for various forms of jump, Taylor Simpson, 2022/11/04
- [PATCH v3 02/11] Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur, Taylor Simpson, 2022/11/04
- [PATCH v3 01/11] Hexagon (target/hexagon) Add pkt and insn to DisasContext, Taylor Simpson, 2022/11/04