Re: [PATCH v2 22/37] target/i386: reimplement 0x0f 0x78-0x7f, add AVX

[Richard Henderson]

On 9/26/22 07:24, Paolo Bonzini wrote:
> On Sat, Sep 24, 2022 at 10:43 PM Richard Henderson
> <richard.henderson@linaro.org> wrote:
> > > +static void decode_0F79(DisasContext *s, CPUX86State *env, X86OpEntry *entry, 
> > > uint8_t *b)
> > > +{
> > > +    if (s->prefix & PREFIX_REPNZ) {
> > > +        entry->gen = gen_INSERTQ_r;
> > > +    } else if (s->prefix & PREFIX_DATA) {
> > > +        entry->gen = gen_EXTRQ_r;
> > > +    } else {
> > > +        entry->gen = NULL;
> > > +    };
> > > +}
> > ...
> > > +    [0x79] = X86_OP_GROUP2(0F79,       V,x, U,x,       cpuid(SSE4A)),
> >
> > These are not -- they're AMD New Media.
>
> What's the CPUID bit for these? Neither
> https://github.com/intelxed/xed/blob/main/datafiles/amd/xed-amd-sse4a.txt
> nor the AMD programmer's manual makes any distinction between
> EXTRQ/INSERTQ with register operand and the same instruction with
> immediate operands.

Ah, a bit of confusion on my part, mixing up SSE4[12A] and the Intel SSE41 instructions of 
a similar names but not identical function or encoding.  You patch is correct.


r~