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Re: AST2600 support in QEMU


From: Dan Zhang
Subject: Re: AST2600 support in QEMU
Date: Sun, 14 Aug 2022 22:47:41 -0700

On Tue, Aug 9, 2022 at 10:51 PM Cédric Le Goater <clg@kaod.org> wrote:
>
> Hello,
>
> On 8/10/22 04:37, Joel Stanley wrote:
> > Hello Shivi,
> >
> > I've added others to cc who may have some input.
> >
> > On Tue, 9 Aug 2022 at 21:38, Shivi Fotedar <sfotedar@nvidia.com> wrote:
> >>
> >> Hello, we are looking for support for few features for AST2600 in QEMU, 
> >> specifically
> >>
> >> PCIe RC support so BMC can talk to downstream devices for management 
> >> functions.
Normally the RC is the host CPU, BMC and the devices to be managed,
which support MCTP-over-PCIe will be the endpoint (downstream) device
as BMC.  The MCTP message Peer transaction between BMC and managed
device will using route-by-Id to RC(host) then down to endpoint.  I am
referring to DMTF DSP0238 spec. section 6.4

So what does the "PCIe RC support" means? the BMC will be the PCIe RC?
or BMC will be PCIe-Endpoint connect to host PCIe RC.

> >
> > I haven't seen any PCIe work done yet.
>
> I haven't either. There is clearly a need now that we are moving
> away from LPC.
>
> >> MCTP controller to run MCTP protocol on top of PCIe or I2C.
> >
> > What work would be required to do this on top of i2c?
>
> I think Jonathan and Klaus worked on this. See :
>
>    https://lore.kernel.org/qemu-devel/20220525121422.00003a84@Huawei.com/
>
> >> I2C slave so BMC can talk to host CPU QEMU for IPMI
> >
> > Some support for slave mode was merged in v7.1.
>
> yes.
>
> Peter D. experimented with IPMI. See :
>
>    https://lore.kernel.org/qemu-devel/20220630045133.32251-14-me@pjd.dev/
>
> We also merged a new machine including a BMC ast2600 running OpenBMC
> and an ast1030 SoC running OpenBIC. Work to interconnect them on the
> same I2C bus is in progress.
>
> Thanks,
>
> C.
>



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