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[PULL 03/25] target/arm: Catch invalid kvm state also for hvf
From: |
Peter Maydell |
Subject: |
[PULL 03/25] target/arm: Catch invalid kvm state also for hvf |
Date: |
Mon, 27 Jun 2022 11:22:14 +0100 |
From: Alexander Graf <agraf@csgraf.de>
Some features such as running in EL3 or running M profile code are
incompatible with virtualization as QEMU implements it today. To prevent
users from picking invalid configurations on other virt solutions like
Hvf, let's run the same checks there too.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1073
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220620192242.70573-2-agraf@csgraf.de
[PMM: Allow qtest accelerator too; tweak comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b5d5357880..d9c4a9f56d2 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -39,6 +39,7 @@
#include "hw/boards.h"
#endif
#include "sysemu/tcg.h"
+#include "sysemu/qtest.h"
#include "sysemu/hw_accel.h"
#include "kvm_arm.h"
#include "disas/capstone.h"
@@ -1490,25 +1491,32 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
**errp)
}
}
- if (kvm_enabled()) {
+ if (!tcg_enabled() && !qtest_enabled()) {
/*
+ * We assume that no accelerator except TCG (and the "not really an
+ * accelerator" qtest) can handle these features, because Arm hardware
+ * virtualization can't virtualize them.
+ *
* Catch all the cases which might cause us to create more than one
* address space for the CPU (otherwise we will assert() later in
* cpu_address_space_init()).
*/
if (arm_feature(env, ARM_FEATURE_M)) {
error_setg(errp,
- "Cannot enable KVM when using an M-profile guest CPU");
+ "Cannot enable %s when using an M-profile guest CPU",
+ current_accel_name());
return;
}
if (cpu->has_el3) {
error_setg(errp,
- "Cannot enable KVM when guest CPU has EL3 enabled");
+ "Cannot enable %s when guest CPU has EL3 enabled",
+ current_accel_name());
return;
}
if (cpu->tag_memory) {
error_setg(errp,
- "Cannot enable KVM when guest CPUs has MTE enabled");
+ "Cannot enable %s when guest CPUs has MTE enabled",
+ current_accel_name());
return;
}
}
--
2.25.1
- [PULL 09/25] target/arm: Add SMCR_ELx, (continued)
- [PULL 09/25] target/arm: Add SMCR_ELx, Peter Maydell, 2022/06/27
- [PULL 13/25] target/arm: Implement SMSTART, SMSTOP, Peter Maydell, 2022/06/27
- [PULL 17/25] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, Peter Maydell, 2022/06/27
- [PULL 01/25] sphinx: change default language to 'en', Peter Maydell, 2022/06/27
- [PULL 18/25] target/arm: Move arm_cpu_*_finalize to internals.h, Peter Maydell, 2022/06/27
- [PULL 19/25] target/arm: Unexport aarch64_add_*_properties, Peter Maydell, 2022/06/27
- [PULL 21/25] target/arm: Introduce sve_vqm1_for_el_sm, Peter Maydell, 2022/06/27
- [PULL 20/25] target/arm: Add cpu properties for SME, Peter Maydell, 2022/06/27
- [PULL 23/25] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Peter Maydell, 2022/06/27
- [PULL 25/25] target/arm: Check V7VE as well as LPAE in arm_pamax, Peter Maydell, 2022/06/27
- [PULL 03/25] target/arm: Catch invalid kvm state also for hvf,
Peter Maydell <=
- [PULL 08/25] target/arm: Add SVCR, Peter Maydell, 2022/06/27
- [PULL 22/25] target/arm: Add SVL to TB flags, Peter Maydell, 2022/06/27
- [PULL 14/25] target/arm: Move error for sve%d property to arm_cpu_sve_finalize, Peter Maydell, 2022/06/27
- [PULL 24/25] target/arm: Extend arm_pamax to more than aarch64, Peter Maydell, 2022/06/27
- Re: [PULL 00/25] target-arm queue, Richard Henderson, 2022/06/27