[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 04/55] xlnx_dp: fix the wrong register size
From: |
Peter Maydell |
Subject: |
[PULL 04/55] xlnx_dp: fix the wrong register size |
Date: |
Thu, 9 Jun 2022 10:04:46 +0100 |
From: Frederic Konrad <fkonrad@amd.com>
The core and the vblend registers size are wrong, they should respectively be
0x3B0 and 0x1E0 according to:
https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html.
Let's fix that and use macros when creating the mmio region.
Fixes: 58ac482a66d ("introduce xlnx-dp")
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220601172353.3220232-2-fkonrad@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/display/xlnx_dp.h | 9 +++++++--
hw/display/xlnx_dp.c | 17 ++++++++++-------
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h
index 8ab4733bb85..1ef5a89ee74 100644
--- a/include/hw/display/xlnx_dp.h
+++ b/include/hw/display/xlnx_dp.h
@@ -39,10 +39,15 @@
#define AUD_CHBUF_MAX_DEPTH (32 * KiB)
#define MAX_QEMU_BUFFER_SIZE (4 * KiB)
-#define DP_CORE_REG_ARRAY_SIZE (0x3AF >> 2)
+#define DP_CORE_REG_OFFSET (0x0000)
+#define DP_CORE_REG_ARRAY_SIZE (0x3B0 >> 2)
+#define DP_AVBUF_REG_OFFSET (0xB000)
#define DP_AVBUF_REG_ARRAY_SIZE (0x238 >> 2)
-#define DP_VBLEND_REG_ARRAY_SIZE (0x1DF >> 2)
+#define DP_VBLEND_REG_OFFSET (0xA000)
+#define DP_VBLEND_REG_ARRAY_SIZE (0x1E0 >> 2)
+#define DP_AUDIO_REG_OFFSET (0xC000)
#define DP_AUDIO_REG_ARRAY_SIZE (0x50 >> 2)
+#define DP_CONTAINER_SIZE (0xC050)
struct PixmanPlane {
pixman_format_code_t format;
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 9bb781e3125..0378570459d 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -1219,19 +1219,22 @@ static void xlnx_dp_init(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
XlnxDPState *s = XLNX_DP(obj);
- memory_region_init(&s->container, obj, TYPE_XLNX_DP, 0xC050);
+ memory_region_init(&s->container, obj, TYPE_XLNX_DP, DP_CONTAINER_SIZE);
memory_region_init_io(&s->core_iomem, obj, &dp_ops, s, TYPE_XLNX_DP
- ".core", 0x3AF);
- memory_region_add_subregion(&s->container, 0x0000, &s->core_iomem);
+ ".core", sizeof(s->core_registers));
+ memory_region_add_subregion(&s->container, DP_CORE_REG_OFFSET,
+ &s->core_iomem);
memory_region_init_io(&s->vblend_iomem, obj, &vblend_ops, s, TYPE_XLNX_DP
- ".v_blend", 0x1DF);
- memory_region_add_subregion(&s->container, 0xA000, &s->vblend_iomem);
+ ".v_blend", sizeof(s->vblend_registers));
+ memory_region_add_subregion(&s->container, DP_VBLEND_REG_OFFSET,
+ &s->vblend_iomem);
memory_region_init_io(&s->avbufm_iomem, obj, &avbufm_ops, s, TYPE_XLNX_DP
- ".av_buffer_manager", 0x238);
- memory_region_add_subregion(&s->container, 0xB000, &s->avbufm_iomem);
+ ".av_buffer_manager", sizeof(s->avbufm_registers));
+ memory_region_add_subregion(&s->container, DP_AVBUF_REG_OFFSET,
+ &s->avbufm_iomem);
memory_region_init_io(&s->audio_iomem, obj, &audio_ops, s, TYPE_XLNX_DP
".audio", sizeof(s->audio_registers));
--
2.25.1
- [PULL 14/55] target/arm: Move get_phys_addr_pmsav7 to ptw.c, (continued)
- [PULL 14/55] target/arm: Move get_phys_addr_pmsav7 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 18/55] target/arm: Move v8m_security_lookup to ptw.c, Peter Maydell, 2022/06/09
- [PULL 25/55] target/arm: Move arm_pamax, pamax_map into ptw.c, Peter Maydell, 2022/06/09
- [PULL 23/55] target/arm: Move arm_{ldl,ldq}_ptw to ptw.c, Peter Maydell, 2022/06/09
- [PULL 31/55] target/arm: Move regime_ttbr to ptw.c, Peter Maydell, 2022/06/09
- [PULL 29/55] target/arm: Move ap_to_tw_prot etc to ptw.c, Peter Maydell, 2022/06/09
- [PULL 24/55] target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c, Peter Maydell, 2022/06/09
- [PULL 34/55] target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c, Peter Maydell, 2022/06/09
- [PULL 38/55] target/arm: Remove route_to_el2 check from sve_exception_el, Peter Maydell, 2022/06/09
- [PULL 41/55] target/arm: Use el_is_in_host for sve_zcr_len_for_el, Peter Maydell, 2022/06/09
- [PULL 04/55] xlnx_dp: fix the wrong register size,
Peter Maydell <=
- [PULL 15/55] target/arm: Move get_phys_addr_pmsav8 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 19/55] target/arm: Move m_is_{ppb,system}_region to ptw.c, Peter Maydell, 2022/06/09
- [PULL 21/55] target/arm: Move combine_cacheattrs and subroutines to ptw.c, Peter Maydell, 2022/06/09
- [PULL 27/55] target/arm: Move check_s2_mmu_setup to ptw.c, Peter Maydell, 2022/06/09
- [PULL 28/55] target/arm: Move aa32_va_parameters to ptw.c, Peter Maydell, 2022/06/09
- [PULL 36/55] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL, Peter Maydell, 2022/06/09
- [PULL 01/55] target/arm: Declare support for FEAT_RASv1p1, Peter Maydell, 2022/06/09
- [PULL 10/55] target/arm: Move get_phys_addr_v5 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 17/55] target/arm: Move pmsav7_use_background_region to ptw.c, Peter Maydell, 2022/06/09
- [PULL 30/55] target/arm: Move regime_is_user to ptw.c, Peter Maydell, 2022/06/09