[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 10/20] tcg/i386: Implement avx512 immediate sari shift
From: |
Richard Henderson |
Subject: |
[PATCH 10/20] tcg/i386: Implement avx512 immediate sari shift |
Date: |
Sat, 18 Dec 2021 11:42:40 -0800 |
AVX512 has VPSRAQ with immediate operand, in the same form as
with AVX, but requires EVEX encoding and W1.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 29 ++++++++++++++++++++---------
1 file changed, 20 insertions(+), 9 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 69481c188c..c4e6f2e5ea 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -2893,17 +2893,21 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_shli_vec:
+ insn = shift_imm_insn[vece];
sub = 6;
goto gen_shift;
case INDEX_op_shri_vec:
+ insn = shift_imm_insn[vece];
sub = 2;
goto gen_shift;
case INDEX_op_sari_vec:
- tcg_debug_assert(vece != MO_64);
+ insn = shift_imm_insn[vece];
+ if (vece == MO_64) {
+ insn |= P_VEXW | P_EVEX;
+ }
sub = 4;
gen_shift:
tcg_debug_assert(vece != MO_8);
- insn = shift_imm_insn[vece];
if (type == TCG_TYPE_V256) {
insn |= P_VEXL;
}
@@ -3223,16 +3227,23 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
return vece == MO_8 ? -1 : 1;
case INDEX_op_sari_vec:
- /* We must expand the operation for MO_8. */
- if (vece == MO_8) {
+ switch (vece) {
+ case MO_8:
return -1;
- }
- /* We can emulate this for MO_64, but it does not pay off
- unless we're producing at least 4 values. */
- if (vece == MO_64) {
+ case MO_16:
+ case MO_32:
+ return 1;
+ case MO_64:
+ if (have_avx512vl) {
+ return 1;
+ }
+ /*
+ * We can emulate this for MO_64, but it does not pay off
+ * unless we're producing at least 4 values.
+ */
return type >= TCG_TYPE_V256 ? -1 : 0;
}
- return 1;
+ return 0;
case INDEX_op_shls_vec:
case INDEX_op_shrs_vec:
--
2.25.1
- Re: [PATCH 02/20] tcg: Add opcodes for vector nand, nor, eqv, (continued)
- [PATCH 03/20] tcg/ppc: Implement vector NAND, NOR, EQV, Richard Henderson, 2021/12/18
- [PATCH 05/20] tcg/i386: Detect AVX512, Richard Henderson, 2021/12/18
- [PATCH 06/20] tcg/i386: Add tcg_out_evex_opc, Richard Henderson, 2021/12/18
- [PATCH 07/20] tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv, Richard Henderson, 2021/12/18
- [PATCH 08/20] tcg/i386: Implement avx512 variable shifts, Richard Henderson, 2021/12/18
- [PATCH 09/20] tcg/i386: Implement avx512 scalar shift, Richard Henderson, 2021/12/18
- [PATCH 11/20] tcg/i386: Implement avx512 immediate rotate, Richard Henderson, 2021/12/18
- [PATCH 13/20] tcg/i386: Support avx512vbmi2 vector shift-double instructions, Richard Henderson, 2021/12/18
- [PATCH 10/20] tcg/i386: Implement avx512 immediate sari shift,
Richard Henderson <=
- [PATCH 12/20] tcg/i386: Implement avx512 variable rotate, Richard Henderson, 2021/12/18
- [PATCH 15/20] tcg/i386: Remove rotls_vec from tcg_target_op_def, Richard Henderson, 2021/12/18
- [PATCH 14/20] tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double, Richard Henderson, 2021/12/18
- [PATCH 19/20] tcg/i386: Implement more logical operations for avx512, Richard Henderson, 2021/12/18
- [PATCH 17/20] tcg/i386: Implement avx512 min/max/abs, Richard Henderson, 2021/12/18
- [PATCH 18/20] tcg/i386: Implement avx512 multiply, Richard Henderson, 2021/12/18
- [PATCH 20/20] tcg/i386: Implement bitsel for avx512, Richard Henderson, 2021/12/18
- [PATCH 16/20] tcg/i386: Expand scalar rotate with avx512 insns, Richard Henderson, 2021/12/18