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[PULL 10/54] target/ppc: Implement pextd instruction
From: |
David Gibson |
Subject: |
[PULL 10/54] target/ppc: Implement pextd instruction |
Date: |
Tue, 9 Nov 2021 16:51:20 +1100 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211029202424.175401-11-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/helper.h | 1 +
target/ppc/insn32.decode | 1 +
target/ppc/int_helper.c | 18 ++++++++++++++++++
target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++
4 files changed, 32 insertions(+)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 3e22957559..808c582382 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -49,6 +49,7 @@ DEF_HELPER_3(sraw, tl, env, tl, tl)
DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl)
DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index c47a6a02e1..e13f920702 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -127,6 +127,7 @@ CFUGED 011111 ..... ..... ..... 0011011100 - @X
CNTLZDM 011111 ..... ..... ..... 0000111011 - @X
CNTTZDM 011111 ..... ..... ..... 1000111011 - @X
PDEPD 011111 ..... ..... ..... 0010011100 - @X
+PEXTD 011111 ..... ..... ..... 0010111100 - @X
### Float-Point Load Instructions
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 337bb7f4d3..913d76be6e 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -404,6 +404,24 @@ uint64_t helper_PDEPD(uint64_t src, uint64_t mask)
return result;
}
+
+uint64_t helper_PEXTD(uint64_t src, uint64_t mask)
+{
+ int i, o;
+ uint64_t result = 0;
+
+ if (mask == -1) {
+ return src;
+ }
+
+ for (o = 0; mask != 0; o++) {
+ i = ctz64(mask);
+ mask &= mask - 1;
+ result |= ((src >> i) & 1) << o;
+ }
+
+ return result;
+}
#endif
/*****************************************************************************/
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedpoint-impl.c.inc
index f0bf69fbac..220b099fcd 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -481,3 +481,15 @@ static bool trans_PDEPD(DisasContext *ctx, arg_X *a)
#endif
return true;
}
+
+static bool trans_PEXTD(DisasContext *ctx, arg_X *a)
+{
+ REQUIRE_64BIT(ctx);
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+#if defined(TARGET_PPC64)
+ gen_helper_PEXTD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
+#else
+ qemu_build_not_reached();
+#endif
+ return true;
+}
--
2.33.1
- [PULL 03/54] target/ppc: Move load and store floating point instructions to decodetree, (continued)
[PULL 08/54] target/ppc: Implement cnttzdm, David Gibson, 2021/11/09
[PULL 11/54] libdecnumber: introduce decNumberFrom[U]Int128, David Gibson, 2021/11/09
[PULL 07/54] target/ppc: Implement cntlzdm, David Gibson, 2021/11/09
[PULL 14/54] target/ppc: Implement DCFFIXQQ, David Gibson, 2021/11/09
[PULL 17/54] target/ppc: Implement DCTFIXQQ, David Gibson, 2021/11/09
[PULL 10/54] target/ppc: Implement pextd instruction,
David Gibson <=
[PULL 15/54] host-utils: Introduce mulu128, David Gibson, 2021/11/09
[PULL 06/54] target/ppc: Implement PLQ and PSTQ, David Gibson, 2021/11/09
[PULL 09/54] target/ppc: Implement pdepd instruction, David Gibson, 2021/11/09
[PULL 13/54] target/ppc: Introduce REQUIRE_FPU, David Gibson, 2021/11/09
[PULL 18/54] target/ppc: Do not update nip on DFP instructions, David Gibson, 2021/11/09
[PULL 20/54] target/ppc: Move d{add, sub, mul, div, iex}[q] to decodetree, David Gibson, 2021/11/09
[PULL 16/54] libdecnumber: Introduce decNumberIntegralToInt128, David Gibson, 2021/11/09
[PULL 22/54] target/ppc: Move dquai[q], drint{x,n}[q] to decodetree, David Gibson, 2021/11/09
[PULL 29/54] target/ppc: Implement vclzdm/vctzdm instructions, David Gibson, 2021/11/09
[PULL 25/54] target/ppc: Move ddedpd[q], denbcd[q], dscli[q], dscri[q] to decodetree, David Gibson, 2021/11/09