[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to syse
From: |
Richard Henderson |
Subject: |
[PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu |
Date: |
Mon, 13 Sep 2021 17:14:43 -0700 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
All targets call TCGCPUOps::cpu_exec_interrupt() from sysemu code.
Move its declaration to restrict it to system emulation.
Extend the code guarded.
Restrict the static inlined need_replay_interrupt() method to
avoid a "defined but not used" warning.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210911165434.531552-24-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 4 ++--
accel/tcg/cpu-exec.c | 10 +++++++---
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 6c7ab9600b..55123cb4d2 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -35,8 +35,6 @@ struct TCGCPUOps {
void (*cpu_exec_enter)(CPUState *cpu);
/** @cpu_exec_exit: Callback for cpu_exec cleanup */
void (*cpu_exec_exit)(CPUState *cpu);
- /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
- bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
/**
* @tlb_fill: Handle a softmmu tlb miss or user-only address fault
*
@@ -68,6 +66,8 @@ struct TCGCPUOps {
void (*do_interrupt)(CPUState *cpu);
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
#ifdef CONFIG_SOFTMMU
+ /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
+ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
/**
* @do_transaction_failed: Callback for handling failed memory transactions
* (ie bus faults or external aborts; not MMU faults)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 2838177e7f..75dbc1e4e3 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -685,6 +685,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, int
*ret)
return false;
}
+#ifndef CONFIG_USER_ONLY
/*
* CPU_INTERRUPT_POLL is a virtual event which gets converted into a
* "real" interrupt event later. It does not need to be recorded for
@@ -698,12 +699,11 @@ static inline bool need_replay_interrupt(int
interrupt_request)
return true;
#endif
}
+#endif /* !CONFIG_USER_ONLY */
static inline bool cpu_handle_interrupt(CPUState *cpu,
TranslationBlock **last_tb)
{
- CPUClass *cc = CPU_GET_CLASS(cpu);
-
/* Clear the interrupt flag now since we're processing
* cpu->interrupt_request and cpu->exit_request.
* Ensure zeroing happens before reading cpu->exit_request or
@@ -725,6 +725,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
qemu_mutex_unlock_iothread();
return true;
}
+#if !defined(CONFIG_USER_ONLY)
if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
/* Do nothing */
} else if (interrupt_request & CPU_INTERRUPT_HALT) {
@@ -753,12 +754,14 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
qemu_mutex_unlock_iothread();
return true;
}
-#endif
+#endif /* !TARGET_I386 */
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
True when it is, and we should restart on a new TB,
and via longjmp via cpu_loop_exit. */
else {
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
if (cc->tcg_ops->cpu_exec_interrupt &&
cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) {
if (need_replay_interrupt(interrupt_request)) {
@@ -777,6 +780,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
* reload the 'interrupt_request' value */
interrupt_request = cpu->interrupt_request;
}
+#endif /* !CONFIG_USER_ONLY */
if (interrupt_request & CPU_INTERRUPT_EXITTB) {
cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
--
2.25.1
- [PULL 26/44] target/riscv: Restrict cpu_exec_interrupt() handler to sysemu, (continued)
- [PULL 26/44] target/riscv: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 32/44] user: Remove cpu_get_pic_interrupt() stubs, Richard Henderson, 2021/09/13
- [PULL 27/44] target/sh4: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 33/44] user: Mark cpu_loop() with noreturn attribute, Richard Henderson, 2021/09/13
- [PULL 30/44] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 23/44] target/nios2: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 19/44] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder, Richard Henderson, 2021/09/13
- [PULL 12/44] target/xtensa: Restrict do_transaction_failed() to sysemu, Richard Henderson, 2021/09/13
- [PULL 35/44] tcg/arm: Remove fallback definition of __ARM_ARCH, Richard Henderson, 2021/09/13
- [PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call, Richard Henderson, 2021/09/13
- [PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu,
Richard Henderson <=
- [PULL 34/44] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts, Richard Henderson, 2021/09/13
- [PULL 29/44] target/rx: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 37/44] tcg/arm: Simplify use_armv5t_instructions, Richard Henderson, 2021/09/13
- [PULL 39/44] tcg/arm: Split out tcg_out_ldstm, Richard Henderson, 2021/09/13
- [PULL 36/44] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}, Richard Henderson, 2021/09/13
- [PULL 41/44] tcg/arm: Drop inline markers, Richard Henderson, 2021/09/13
- [PULL 43/44] tcg/arm: More use of the ARMInsn enum, Richard Henderson, 2021/09/13
- [PULL 40/44] tcg/arm: Simplify usage of encode_imm, Richard Henderson, 2021/09/13
- [PULL 44/44] tcg/arm: More use of the TCGReg enum, Richard Henderson, 2021/09/13
- [PULL 42/44] tcg/arm: Give enum arm_cond_code_e a typedef and use it, Richard Henderson, 2021/09/13