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[PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and TCG |
Date: |
Sun, 12 Sep 2021 19:27:18 +0200 |
Restrict has_work() to TCG sysemu.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 00e0c55d0e4..3639c03f8ea 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -128,6 +128,7 @@ static void mips_cpu_set_pc(CPUState *cs, vaddr value)
mips_env_set_pc(&cpu->env, value);
}
+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
static bool mips_cpu_has_work(CPUState *cs)
{
MIPSCPU *cpu = MIPS_CPU(cs);
@@ -172,6 +173,7 @@ static bool mips_cpu_has_work(CPUState *cs)
}
return has_work;
}
+#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
#include "cpu-defs.c.inc"
@@ -542,6 +544,7 @@ static const struct TCGCPUOps mips_tcg_ops = {
.tlb_fill = mips_cpu_tlb_fill,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = mips_cpu_has_work,
.cpu_exec_interrupt = mips_cpu_exec_interrupt,
.do_interrupt = mips_cpu_do_interrupt,
.do_transaction_failed = mips_cpu_do_transaction_failed,
@@ -563,7 +566,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
device_class_set_props(dc, mips_cpu_properties);
cc->class_by_name = mips_cpu_class_by_name;
- cc->has_work = mips_cpu_has_work;
cc->dump_state = mips_cpu_dump_state;
cc->set_pc = mips_cpu_set_pc;
cc->gdb_read_register = mips_cpu_gdb_read_register;
--
2.31.1
- [PATCH v4 06/30] accel/whpx: Implement AccelOpsClass::has_work(), (continued)
- [PATCH v4 06/30] accel/whpx: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 08/30] target/alpha: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 10/30] target/avr: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 11/30] target/cris: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 12/30] target/hexagon: Remove unused has_work() handler, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 13/30] target/hppa: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 14/30] target/i386: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 15/30] target/m68k: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 16/30] target/microblaze: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and TCG,
Philippe Mathieu-Daudé <=
- [PATCH v4 18/30] target/nios2: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 19/30] target/openrisc: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 20/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 21/30] target/ppc: Restrict has_work() handlers to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 22/30] target/riscv: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 23/30] target/rx: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 24/30] target/s390x: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 25/30] target/sh4: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12