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[PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and T
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and TCG |
Date: |
Sun, 12 Sep 2021 19:27:10 +0200 |
Restrict has_work() to TCG sysemu.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ba0741b20e4..e11aa625a5f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -73,8 +73,8 @@ void arm_cpu_synchronize_from_tb(CPUState *cs,
env->regs[15] = tb->pc;
}
}
-#endif /* CONFIG_TCG */
+#ifndef CONFIG_USER_ONLY
static bool arm_cpu_has_work(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
@@ -85,6 +85,9 @@ static bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
| CPU_INTERRUPT_EXITTB);
}
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* CONFIG_TCG */
void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
@@ -2017,6 +2020,7 @@ static const struct TCGCPUOps arm_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_cpu_has_work,
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
.do_interrupt = arm_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -2041,7 +2045,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, arm_cpu_reset, &acc->parent_reset);
cc->class_by_name = arm_cpu_class_by_name;
- cc->has_work = arm_cpu_has_work;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
--
2.31.1
- [PATCH v4 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 01/30] accel/tcg: Restrict cpu_handle_halt() to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 02/30] hw/core: Restrict cpu_has_work() to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 03/30] hw/core: Un-inline cpu_has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 04/30] sysemu: Introduce AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 05/30] accel/kvm: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 07/30] accel/tcg: Implement AccelOpsClass::has_work() as stub, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 06/30] accel/whpx: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 08/30] target/alpha: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and TCG,
Philippe Mathieu-Daudé <=
- [PATCH v4 10/30] target/avr: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 11/30] target/cris: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 12/30] target/hexagon: Remove unused has_work() handler, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 13/30] target/hppa: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 14/30] target/i386: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 15/30] target/m68k: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 16/30] target/microblaze: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 18/30] target/nios2: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12
- [PATCH v4 19/30] target/openrisc: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/12