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[PATCH v3 12/14] tcg/arm: More use of the TCGReg enum
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From: |
Richard Henderson |
|
Subject: |
[PATCH v3 12/14] tcg/arm: More use of the TCGReg enum |
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Date: |
Wed, 18 Aug 2021 11:29:10 -1000 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.c.inc | 65 +++++++++++++++++++++-------------------
1 file changed, 35 insertions(+), 30 deletions(-)
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 2f55b94ada..35bd4c68d6 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -552,7 +552,7 @@ static void tcg_out_bl_imm(TCGContext *s, ARMCond cond,
int32_t offset)
(((offset - 8) >> 2) & 0x00ffffff));
}
-static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, int rn)
+static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, TCGReg rn)
{
tcg_out32(s, (cond << 28) | 0x012fff30 | rn);
}
@@ -563,14 +563,14 @@ static void tcg_out_blx_imm(TCGContext *s, int32_t offset)
(((offset - 8) >> 2) & 0x00ffffff));
}
-static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc, int rd,
- int rn, int rm, int shift)
+static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc,
+ TCGReg rd, TCGReg rn, TCGReg rm, int shift)
{
tcg_out32(s, (cond << 28) | (0 << 25) | opc |
(rn << 16) | (rd << 12) | shift | rm);
}
-static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, int rd, int rm)
+static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rm)
{
/* Simple reg-reg move, optimising out the 'do nothing' case */
if (rd != rm) {
@@ -597,7 +597,7 @@ static void tcg_out_b_reg(TCGContext *s, ARMCond cond,
TCGReg rn)
}
static void tcg_out_dat_imm(TCGContext *s, ARMCond cond, ARMInsn opc,
- int rd, int rn, int im)
+ TCGReg rd, TCGReg rn, int im)
{
tcg_out32(s, (cond << 28) | (1 << 25) | opc |
(rn << 16) | (rd << 12) | im);
@@ -781,13 +781,15 @@ static void tcg_out_ld8s_r(TCGContext *s, ARMCond cond,
TCGReg rt,
tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0);
}
-static void tcg_out_movi_pool(TCGContext *s, ARMCond cond, int rd, uint32_t
arg)
+static void tcg_out_movi_pool(TCGContext *s, ARMCond cond,
+ TCGReg rd, uint32_t arg)
{
new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0);
tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0);
}
-static void tcg_out_movi32(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
+static void tcg_out_movi32(TCGContext *s, ARMCond cond,
+ TCGReg rd, uint32_t arg)
{
int imm12, diff, opc, sh1, sh2;
uint32_t tt0, tt1, tt2;
@@ -866,8 +868,8 @@ static void tcg_out_movi32(TCGContext *s, ARMCond cond, int
rd, uint32_t arg)
* Emit either the reg,imm or reg,reg form of a data-processing insn.
* rhs must satisfy the "rI" constraint.
*/
-static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc, TCGArg
dst,
- TCGArg lhs, TCGArg rhs, int rhs_is_const)
+static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc,
+ TCGReg dst, TCGReg lhs, TCGArg rhs, int
rhs_is_const)
{
if (rhs_is_const) {
tcg_out_dat_imm(s, cond, opc, dst, lhs, encode_imm_nofail(rhs));
@@ -897,7 +899,7 @@ static void tcg_out_dat_rIK(TCGContext *s, ARMCond cond,
ARMInsn opc,
}
static void tcg_out_dat_rIN(TCGContext *s, ARMCond cond, ARMInsn opc,
- ARMInsn opneg, TCGArg dst, TCGArg lhs, TCGArg rhs,
+ ARMInsn opneg, TCGReg dst, TCGReg lhs, TCGArg rhs,
bool rhs_is_const)
{
/* Emit either the reg,imm or reg,reg form of a data-processing insn.
@@ -971,17 +973,19 @@ static void tcg_out_smull32(TCGContext *s, ARMCond cond,
TCGReg rd0,
(rd1 << 16) | (rd0 << 12) | (rm << 8) | rn);
}
-static void tcg_out_sdiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
+static void tcg_out_sdiv(TCGContext *s, ARMCond cond,
+ TCGReg rd, TCGReg rn, TCGReg rm)
{
tcg_out32(s, 0x0710f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
}
-static void tcg_out_udiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
+static void tcg_out_udiv(TCGContext *s, ARMCond cond,
+ TCGReg rd, TCGReg rn, TCGReg rm)
{
tcg_out32(s, 0x0730f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
}
-static void tcg_out_ext8s(TCGContext *s, ARMCond cond, int rd, int rn)
+static void tcg_out_ext8s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
{
if (use_armv6_instructions) {
/* sxtb */
@@ -995,12 +999,12 @@ static void tcg_out_ext8s(TCGContext *s, ARMCond cond,
int rd, int rn)
}
static void __attribute__((unused))
-tcg_out_ext8u(TCGContext *s, ARMCond cond, int rd, int rn)
+tcg_out_ext8u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
{
tcg_out_dat_imm(s, cond, ARITH_AND, rd, rn, 0xff);
}
-static void tcg_out_ext16s(TCGContext *s, ARMCond cond, int rd, int rn)
+static void tcg_out_ext16s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
{
if (use_armv6_instructions) {
/* sxth */
@@ -1013,7 +1017,7 @@ static void tcg_out_ext16s(TCGContext *s, ARMCond cond,
int rd, int rn)
}
}
-static void tcg_out_ext16u(TCGContext *s, ARMCond cond, int rd, int rn)
+static void tcg_out_ext16u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
{
if (use_armv6_instructions) {
/* uxth */
@@ -1026,7 +1030,8 @@ static void tcg_out_ext16u(TCGContext *s, ARMCond cond,
int rd, int rn)
}
}
-static void tcg_out_bswap16(TCGContext *s, ARMCond cond, int rd, int rn, int
flags)
+static void tcg_out_bswap16(TCGContext *s, ARMCond cond,
+ TCGReg rd, TCGReg rn, int flags)
{
if (use_armv6_instructions) {
if (flags & TCG_BSWAP_OS) {
@@ -1093,7 +1098,7 @@ static void tcg_out_bswap16(TCGContext *s, ARMCond cond,
int rd, int rn, int fla
? SHIFT_IMM_ASR(8) : SHIFT_IMM_LSR(8)));
}
-static void tcg_out_bswap32(TCGContext *s, ARMCond cond, int rd, int rn)
+static void tcg_out_bswap32(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
{
if (use_armv6_instructions) {
/* rev */
@@ -1123,23 +1128,23 @@ static void tcg_out_deposit(TCGContext *s, ARMCond
cond, TCGReg rd,
}
static void tcg_out_extract(TCGContext *s, ARMCond cond, TCGReg rd,
- TCGArg a1, int ofs, int len)
+ TCGReg rn, int ofs, int len)
{
/* ubfx */
- tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | a1
+ tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | rn
| (ofs << 7) | ((len - 1) << 16));
}
static void tcg_out_sextract(TCGContext *s, ARMCond cond, TCGReg rd,
- TCGArg a1, int ofs, int len)
+ TCGReg rn, int ofs, int len)
{
/* sbfx */
- tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | a1
+ tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | rn
| (ofs << 7) | ((len - 1) << 16));
}
static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xfff || offset < -0xfff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1149,7 +1154,7 @@ static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
}
static void tcg_out_st32(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xfff || offset < -0xfff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1159,7 +1164,7 @@ static void tcg_out_st32(TCGContext *s, ARMCond cond,
}
static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xff || offset < -0xff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1169,7 +1174,7 @@ static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
}
static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xff || offset < -0xff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1179,7 +1184,7 @@ static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
}
static void tcg_out_st16(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xff || offset < -0xff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1189,7 +1194,7 @@ static void tcg_out_st16(TCGContext *s, ARMCond cond,
}
static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xfff || offset < -0xfff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1199,7 +1204,7 @@ static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
}
static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xff || offset < -0xff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1209,7 +1214,7 @@ static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
}
static void tcg_out_st8(TCGContext *s, ARMCond cond,
- int rd, int rn, int32_t offset)
+ TCGReg rd, TCGReg rn, int32_t offset)
{
if (offset > 0xfff || offset < -0xfff) {
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
--
2.25.1