qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 34/55] accel/tcg: Add cpu_{ld,st}*_mmu interfaces


From: Richard Henderson
Subject: Re: [PATCH v2 34/55] accel/tcg: Add cpu_{ld,st}*_mmu interfaces
Date: Wed, 18 Aug 2021 07:50:51 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 8/17/21 11:01 PM, Philippe Mathieu-Daudé wrote:
On 8/3/21 6:14 AM, Richard Henderson wrote:
These functions are much closer to the softmmu helper
functions, in that they take the complete MemOpIdx,
and from that they may enforce required alignment.

The previous cpu_ldst.h functions did not have alignment info,
and so did not enforce it.  Retain this by adding MO_UNALN to
the MemOp that we create in calling the new functions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
  docs/devel/loads-stores.rst |  52 ++++-
  include/exec/cpu_ldst.h     | 245 ++++++++--------------
  accel/tcg/cputlb.c          | 392 ++++++++++++------------------------
  accel/tcg/user-exec.c       | 390 +++++++++++++++--------------------
  accel/tcg/ldst_common.c.inc | 307 ++++++++++++++++++++++++++++
  5 files changed, 722 insertions(+), 664 deletions(-)
  create mode 100644 accel/tcg/ldst_common.c.inc

  Function names follow the pattern:
+load: ``cpu_ld{size}{end}_mmu(env, ptr, oi, retaddr)``
+
+store: ``cpu_st{size}{end}_mmu(env, ptr, val, oi, retaddr)``
+
+``size``
+ - ``b`` : 8 bits
+ - ``w`` : 16 bits
+ - ``l`` : 32 bits
+ - ``q`` : 64 bits

kinda unrelated to this patch, but what would be the pattern
for 128 bits? ``o`` for octoword?

Yeah, that's what we've done for the 128-bit atomics.

r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]