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[PATCH v2 26/55] accel/tcg: Pass MemOpIdx to atomic_trace_*_post
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 26/55] accel/tcg: Pass MemOpIdx to atomic_trace_*_post |
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Date: |
Mon, 2 Aug 2021 18:14:14 -1000 |
We will shortly use the MemOpIdx directly, but in the meantime
re-compute the trace meminfo.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/atomic_template.h | 48 +++++++++++++++++------------------
accel/tcg/atomic_common.c.inc | 30 +++++++++++-----------
2 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 4230ff2957..c08d859a8a 100644
--- a/accel/tcg/atomic_template.h
+++ b/accel/tcg/atomic_template.h
@@ -77,15 +77,15 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env,
target_ulong addr,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi);
+ atomic_trace_rmw_pre(env, addr, oi);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, cmpv, newv);
#else
ret = qatomic_cmpxchg__nocheck(haddr, cmpv, newv);
#endif
ATOMIC_MMU_CLEANUP;
- atomic_trace_rmw_post(env, addr, info);
+ atomic_trace_rmw_post(env, addr, oi);
return ret;
}
@@ -97,11 +97,11 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong
addr,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ, retaddr);
DATA_TYPE val;
- uint16_t info = atomic_trace_ld_pre(env, addr, oi);
+ atomic_trace_ld_pre(env, addr, oi);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
- atomic_trace_ld_post(env, addr, info);
+ atomic_trace_ld_post(env, addr, oi);
return val;
}
@@ -110,11 +110,11 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong
addr, ABI_TYPE val,
{
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_WRITE, retaddr);
- uint16_t info = atomic_trace_st_pre(env, addr, oi);
+ atomic_trace_st_pre(env, addr, oi);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
- atomic_trace_st_post(env, addr, info);
+ atomic_trace_st_post(env, addr, oi);
}
#endif
#else
@@ -124,11 +124,11 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env,
target_ulong addr, ABI_TYPE val,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi);
+ atomic_trace_rmw_pre(env, addr, oi);
ret = qatomic_xchg__nocheck(haddr, val);
ATOMIC_MMU_CLEANUP;
- atomic_trace_rmw_post(env, addr, info);
+ atomic_trace_rmw_post(env, addr, oi);
return ret;
}
@@ -139,10 +139,10 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
DATA_TYPE ret; \
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi); \
+ atomic_trace_rmw_pre(env, addr, oi); \
ret = qatomic_##X(haddr, val); \
ATOMIC_MMU_CLEANUP; \
- atomic_trace_rmw_post(env, addr, info); \
+ atomic_trace_rmw_post(env, addr, oi); \
return ret; \
}
@@ -172,7 +172,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
XDATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
XDATA_TYPE cmp, old, new, val = xval; \
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi); \
+ atomic_trace_rmw_pre(env, addr, oi); \
smp_mb(); \
cmp = qatomic_read__nocheck(haddr); \
do { \
@@ -180,7 +180,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
cmp = qatomic_cmpxchg__nocheck(haddr, old, new); \
} while (cmp != old); \
ATOMIC_MMU_CLEANUP; \
- atomic_trace_rmw_post(env, addr, info); \
+ atomic_trace_rmw_post(env, addr, oi); \
return RET; \
}
@@ -216,15 +216,15 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env,
target_ulong addr,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi);
+ atomic_trace_rmw_pre(env, addr, oi);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, BSWAP(cmpv), BSWAP(newv));
#else
ret = qatomic_cmpxchg__nocheck(haddr, BSWAP(cmpv), BSWAP(newv));
#endif
ATOMIC_MMU_CLEANUP;
- atomic_trace_rmw_post(env, addr, info);
+ atomic_trace_rmw_post(env, addr, oi);
return BSWAP(ret);
}
@@ -236,11 +236,11 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong
addr,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ, retaddr);
DATA_TYPE val;
- uint16_t info = atomic_trace_ld_pre(env, addr, oi);
+ atomic_trace_ld_pre(env, addr, oi);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
- atomic_trace_ld_post(env, addr, info);
+ atomic_trace_ld_post(env, addr, oi);
return BSWAP(val);
}
@@ -249,12 +249,12 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong
addr, ABI_TYPE val,
{
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_WRITE, retaddr);
- uint16_t info = atomic_trace_st_pre(env, addr, oi);
+ atomic_trace_st_pre(env, addr, oi);
val = BSWAP(val);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
- atomic_trace_st_post(env, addr, info);
+ atomic_trace_st_post(env, addr, oi);
}
#endif
#else
@@ -264,11 +264,11 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env,
target_ulong addr, ABI_TYPE val,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_READ | PAGE_WRITE, retaddr);
ABI_TYPE ret;
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi);
+ atomic_trace_rmw_pre(env, addr, oi);
ret = qatomic_xchg__nocheck(haddr, BSWAP(val));
ATOMIC_MMU_CLEANUP;
- atomic_trace_rmw_post(env, addr, info);
+ atomic_trace_rmw_post(env, addr, oi);
return BSWAP(ret);
}
@@ -279,10 +279,10 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
DATA_TYPE ret; \
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi); \
+ atomic_trace_rmw_pre(env, addr, oi); \
ret = qatomic_##X(haddr, BSWAP(val)); \
ATOMIC_MMU_CLEANUP; \
- atomic_trace_rmw_post(env, addr, info); \
+ atomic_trace_rmw_post(env, addr, oi); \
return BSWAP(ret); \
}
@@ -309,7 +309,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
XDATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
XDATA_TYPE ldo, ldn, old, new, val = xval; \
- uint16_t info = atomic_trace_rmw_pre(env, addr, oi); \
+ atomic_trace_rmw_pre(env, addr, oi); \
smp_mb(); \
ldn = qatomic_read__nocheck(haddr); \
do { \
@@ -317,7 +317,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong
addr, \
ldn = qatomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new)); \
} while (ldo != ldn); \
ATOMIC_MMU_CLEANUP; \
- atomic_trace_rmw_post(env, addr, info); \
+ atomic_trace_rmw_post(env, addr, oi); \
return RET; \
}
diff --git a/accel/tcg/atomic_common.c.inc b/accel/tcg/atomic_common.c.inc
index 6019a957b9..db81eb5e66 100644
--- a/accel/tcg/atomic_common.c.inc
+++ b/accel/tcg/atomic_common.c.inc
@@ -13,55 +13,55 @@
* See the COPYING file in the top-level directory.
*/
-static uint16_t atomic_trace_rmw_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
+static void atomic_trace_rmw_pre(CPUArchState *env, target_ulong addr,
+ MemOpIdx oi)
{
CPUState *cpu = env_cpu(env);
uint16_t info = trace_mem_get_info(oi, false);
trace_guest_mem_before_exec(cpu, addr, info);
trace_guest_mem_before_exec(cpu, addr, info | TRACE_MEM_ST);
-
- return info;
}
static void atomic_trace_rmw_post(CPUArchState *env, target_ulong addr,
- uint16_t info)
+ MemOpIdx oi)
{
+ uint16_t info = trace_mem_get_info(oi, false);
+
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, info);
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, info | TRACE_MEM_ST);
}
#if HAVE_ATOMIC128
-static uint16_t atomic_trace_ld_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
+static void atomic_trace_ld_pre(CPUArchState *env, target_ulong addr,
+ MemOpIdx oi)
{
uint16_t info = trace_mem_get_info(oi, false);
trace_guest_mem_before_exec(env_cpu(env), addr, info);
-
- return info;
}
static void atomic_trace_ld_post(CPUArchState *env, target_ulong addr,
- uint16_t info)
+ MemOpIdx oi)
{
+ uint16_t info = trace_mem_get_info(oi, false);
+
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, info);
}
-static uint16_t atomic_trace_st_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
+static void atomic_trace_st_pre(CPUArchState *env, target_ulong addr,
+ MemOpIdx oi)
{
uint16_t info = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), addr, info);
-
- return info;
}
static void atomic_trace_st_post(CPUArchState *env, target_ulong addr,
- uint16_t info)
+ MemOpIdx oi)
{
+ uint16_t info = trace_mem_get_info(oi, false);
+
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, info);
}
#endif
--
2.25.1
- Re: [PATCH v2 20/55] accel/tcg: Report unaligned atomics for user-only, (continued)
- [PATCH v2 21/55] accel/tcg: Drop signness in tracing in cputlb.c, Richard Henderson, 2021/08/03
- [PATCH v2 19/55] target/xtensa: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 22/55] tcg: Expand MO_SIZE to 3 bits, Richard Henderson, 2021/08/03
- [PATCH v2 24/55] tcg: Split out MemOpIdx to exec/memopidx.h, Richard Henderson, 2021/08/03
- [PATCH v2 23/55] tcg: Rename TCGMemOpIdx to MemOpIdx, Richard Henderson, 2021/08/03
- [PATCH v2 26/55] accel/tcg: Pass MemOpIdx to atomic_trace_*_post,
Richard Henderson <=
- [PATCH v2 25/55] trace/mem: Pass MemOpIdx to trace_mem_get_info, Richard Henderson, 2021/08/03
- [PATCH v2 29/55] target/arm: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/08/03
- [PATCH v2 28/55] trace: Split guest_mem_before, Richard Henderson, 2021/08/03
- [PATCH v2 34/55] accel/tcg: Add cpu_{ld,st}*_mmu interfaces, Richard Henderson, 2021/08/03
- [PATCH v2 27/55] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb, Richard Henderson, 2021/08/03
- [PATCH v2 39/55] target/sparc: Use cpu_*_mmu instead of helper_*_mmu, Richard Henderson, 2021/08/03