[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH-for-6.1?] target/mips: Remove MOVZ/MOVN opcodes from Loongson
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH-for-6.1?] target/mips: Remove MOVZ/MOVN opcodes from Loongson 2E |
Date: |
Mon, 2 Aug 2021 15:17:27 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 8/2/21 2:18 PM, Maciej W. Rozycki wrote:
> On Mon, 2 Aug 2021, Philippe Mathieu-Daudé wrote:
>
>>> Per the "Godson-2E User Manual v0.6", the Loongson 2E processor
>>> does not implement the MOVZ/MOVN instructions
>>
>> I'm confused because I can't find MOVZ/MOVN in the 2E manual and
>> the 2F explicits the difference. However looking at binutils,
>> these opcodes are also emited on the 2E:
>> https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e
>
> I find the manual a bit messy. It does say however:
>
> "3.2.3 Instruction set mode
>
> "Godson-2E processor implements a full feature MIPS III Instruction Set
> Architecture (ISA) plus some MIPS IV ISA instructions, like paired single,
> move condition and multiply add."
>
>> Cc'ing Mark & Maciej in case they can enlighten me, and few
>> Loongson develeper in case they could check, because I don't
>> have 2E hardware to test.
>
> At least this trivial program:
>
> int main(void)
> {
> asm volatile(".set push; .set mips4; movn $0,$0,$0; .set pop");
> return 0;
> }
>
> does not trap on actual hardware.
Thank you very much for your time and testing!
> I may not be able to find time right
> now for a more exhaustive test.
This is fine for me now, I'll add documentation to justify while the
the documentation doesn't describe MOVZ/MOVN, it mentions "implements
MIPS IV ISA instructions like move condition" so we assume they are,
also with your test not trapping.
Regards,
Phil.