qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH-for-6.1?] target/mips: Remove MOVZ/MOVN opcodes from Loongson


From: Maciej W. Rozycki
Subject: Re: [PATCH-for-6.1?] target/mips: Remove MOVZ/MOVN opcodes from Loongson 2E
Date: Mon, 2 Aug 2021 14:18:36 +0200 (CEST)
User-agent: Alpine 2.21 (DEB 202 2017-01-01)

On Mon, 2 Aug 2021, Philippe Mathieu-Daudé wrote:

> > Per the "Godson-2E User Manual v0.6", the Loongson 2E processor
> > does not implement the MOVZ/MOVN instructions
> 
> I'm confused because I can't find MOVZ/MOVN in the 2E manual and
> the 2F explicits the difference. However looking at binutils,
> these opcodes are also emited on the 2E:
> https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e

 I find the manual a bit messy.  It does say however:

"3.2.3 Instruction set mode

"Godson-2E processor implements a full feature MIPS III Instruction Set 
Architecture (ISA) plus some MIPS IV ISA instructions, like paired single, 
move condition and multiply add."

> Cc'ing Mark & Maciej in case they can enlighten me, and few
> Loongson develeper in case they could check, because I don't
> have 2E hardware to test.

 At least this trivial program:

int main(void)
{
        asm volatile(".set push; .set mips4; movn $0,$0,$0; .set pop");
        return 0;
}

does not trap on actual hardware.  I may not be able to find time right 
now for a more exhaustive test.

  Maciej



reply via email to

[Prev in Thread] Current Thread [Next in Thread]