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[PULL 08/19] target/mips/tx79: Introduce PCGT* (Parallel Compare for Gre
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 08/19] target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) |
Date: |
Sun, 11 Jul 2021 23:00:05 +0200 |
Introduce the 'Parallel Compare for Greater Than' opcodes:
- PCGTB (Parallel Compare for Greater Than Byte)
- PCGTH (Parallel Compare for Greater Than Halfword)
- PCGTW (Parallel Compare for Greater Than Word)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210309145653.743937-15-f4bug@amsat.org>
---
target/mips/tcg/tx79.decode | 3 +++
target/mips/tcg/tx79_translate.c | 18 ++++++++++++++++++
2 files changed, 21 insertions(+)
diff --git a/target/mips/tcg/tx79.decode b/target/mips/tcg/tx79.decode
index cfe721755ca..63fbe9694bb 100644
--- a/target/mips/tcg/tx79.decode
+++ b/target/mips/tcg/tx79.decode
@@ -32,8 +32,11 @@ MTLO1 011100 ..... 0000000000 00000 010011 @rs
# MMI0
PSUBW 011100 ..... ..... ..... 00001 001000 @rs_rt_rd
+PCGTW 011100 ..... ..... ..... 00010 001000 @rs_rt_rd
PSUBH 011100 ..... ..... ..... 00101 001000 @rs_rt_rd
+PCGTH 011100 ..... ..... ..... 00110 001000 @rs_rt_rd
PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd
+PCGTB 011100 ..... ..... ..... 01010 001000 @rs_rt_rd
PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd
PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd
PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd
diff --git a/target/mips/tcg/tx79_translate.c b/target/mips/tcg/tx79_translate.c
index 8dd510c2719..f0e3d8c0b66 100644
--- a/target/mips/tcg/tx79_translate.c
+++ b/target/mips/tcg/tx79_translate.c
@@ -285,18 +285,36 @@ static bool trans_parallel_compare(DisasContext *ctx,
arg_rtype *a,
return true;
}
+/* Parallel Compare for Greater Than Byte */
+static bool trans_PCGTB(DisasContext *ctx, arg_rtype *a)
+{
+ return trans_parallel_compare(ctx, a, TCG_COND_GE, 8);
+}
+
/* Parallel Compare for Equal Byte */
static bool trans_PCEQB(DisasContext *ctx, arg_rtype *a)
{
return trans_parallel_compare(ctx, a, TCG_COND_EQ, 8);
}
+/* Parallel Compare for Greater Than Halfword */
+static bool trans_PCGTH(DisasContext *ctx, arg_rtype *a)
+{
+ return trans_parallel_compare(ctx, a, TCG_COND_GE, 16);
+}
+
/* Parallel Compare for Equal Halfword */
static bool trans_PCEQH(DisasContext *ctx, arg_rtype *a)
{
return trans_parallel_compare(ctx, a, TCG_COND_EQ, 16);
}
+/* Parallel Compare for Greater Than Word */
+static bool trans_PCGTW(DisasContext *ctx, arg_rtype *a)
+{
+ return trans_parallel_compare(ctx, a, TCG_COND_GE, 32);
+}
+
/* Parallel Compare for Equal Word */
static bool trans_PCEQW(DisasContext *ctx, arg_rtype *a)
{
--
2.31.1
- [PULL 00/19] MIPS patches for 2021-07-11, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 01/19] hw/pci-host: Rename Raven ASIC PCI bridge as raven.c, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 03/19] target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 04/19] target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 02/19] hw/pci-host/raven: Add PCI_IO_BASE_ADDR definition, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 05/19] target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 06/19] target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 07/19] target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 08/19] target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than),
Philippe Mathieu-Daudé <=
- [PULL 09/19] target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 10/19] target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 11/19] target/mips/tx79: Introduce LQ opcode (Load Quadword), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 12/19] target/mips/tx79: Introduce SQ opcode (Store Quadword), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 13/19] target/mips: Rewrite UHI errno_mips() using switch statement, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 14/19] dp8393x: fix CAM descriptor entry index, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 15/19] dp8393x: Replace address_space_rw(is_write=1) by address_space_write(), Philippe Mathieu-Daudé, 2021/07/11
- [PULL 16/19] dp8393x: Replace 0x40 magic value by SONIC_REG_COUNT definition, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 17/19] dp8393x: Store CAM registers as 16-bit, Philippe Mathieu-Daudé, 2021/07/11
- [PULL 18/19] dp8393x: Rewrite dp8393x_get() / dp8393x_put(), Philippe Mathieu-Daudé, 2021/07/11