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[PULL 34/63] tcg: Use correct trap number for page faults on *BSD system
From: |
Richard Henderson |
Subject: |
[PULL 34/63] tcg: Use correct trap number for page faults on *BSD systems |
Date: |
Tue, 29 Jun 2021 11:54:26 -0700 |
From: Warner Losh <imp@bsdimp.com>
The trap number for a page fault on BSD systems is T_PAGEFLT
not 0xe -- 0xe is used by Linux and represents the intel hardware
trap vector. The BSD kernels, however, translate this to T_PAGEFLT
in their Xpage, Xtrap0e, Xtrap14, etc fault handlers. This is true
for i386 and x86_64, though the name of the trap hanlder can very
on the flavor of BSD. As far as I can tell, Linux doesn't provide
a define for this value. Invent a new one (PAGE_FAULT_TRAP) and
use it instead to avoid uglier ifdefs.
Signed-off-by: Mark Johnston <markj@FreeBSD.org>
Signed-off-by: Juergen Lock <nox@FreeBSD.org>
[ Rework to avoid ifdefs and expand it to i386 ]
Signed-off-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20210625045707.84534-3-imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/user-exec.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index e67b1617b5..ba09fd0413 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -254,28 +254,35 @@ void *probe_access(CPUArchState *env, target_ulong addr,
int size,
#if defined(__NetBSD__)
#include <ucontext.h>
+#include <machine/trap.h>
#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#elif defined(__FreeBSD__) || defined(__DragonFly__)
#include <ucontext.h>
+#include <machine/trap.h>
#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#elif defined(__OpenBSD__)
+#include <machine/trap.h>
#define EIP_sig(context) ((context)->sc_eip)
#define TRAP_sig(context) ((context)->sc_trapno)
#define ERROR_sig(context) ((context)->sc_err)
#define MASK_sig(context) ((context)->sc_mask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#else
#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP 0xe
#endif
int cpu_signal_handler(int host_signum, void *pinfo,
@@ -301,34 +308,42 @@ int cpu_signal_handler(int host_signum, void *pinfo,
pc = EIP_sig(uc);
trapno = TRAP_sig(uc);
return handle_cpu_signal(pc, info,
- trapno == 0xe ? (ERROR_sig(uc) >> 1) & 1 : 0,
+ trapno == PAGE_FAULT_TRAP ?
+ (ERROR_sig(uc) >> 1) & 1 : 0,
&MASK_sig(uc));
}
#elif defined(__x86_64__)
#ifdef __NetBSD__
+#include <machine/trap.h>
#define PC_sig(context) _UC_MACHINE_PC(context)
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#elif defined(__OpenBSD__)
+#include <machine/trap.h>
#define PC_sig(context) ((context)->sc_rip)
#define TRAP_sig(context) ((context)->sc_trapno)
#define ERROR_sig(context) ((context)->sc_err)
#define MASK_sig(context) ((context)->sc_mask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#elif defined(__FreeBSD__) || defined(__DragonFly__)
#include <ucontext.h>
+#include <machine/trap.h>
#define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP T_PAGEFLT
#else
#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
#define MASK_sig(context) ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP 0xe
#endif
int cpu_signal_handler(int host_signum, void *pinfo,
@@ -346,7 +361,8 @@ int cpu_signal_handler(int host_signum, void *pinfo,
pc = PC_sig(uc);
return handle_cpu_signal(pc, info,
- TRAP_sig(uc) == 0xe ? (ERROR_sig(uc) >> 1) & 1 :
0,
+ TRAP_sig(uc) == PAGE_FAULT_TRAP ?
+ (ERROR_sig(uc) >> 1) & 1 : 0,
&MASK_sig(uc));
}
--
2.25.1
- [PULL 21/63] target/cris: Fold unhandled X_FLAG changes into cpustate_changed, (continued)
- [PULL 21/63] target/cris: Fold unhandled X_FLAG changes into cpustate_changed, Richard Henderson, 2021/06/29
- [PULL 24/63] target/cris: Add DISAS_DBRANCH, Richard Henderson, 2021/06/29
- [PULL 10/63] target/avr: Add DisasContextBase to DisasContext, Richard Henderson, 2021/06/29
- [PULL 14/63] target/cris: Remove DISAS_SWI, Richard Henderson, 2021/06/29
- [PULL 30/63] tcg: Add tcg_gen_vec_add{sub}8_i32, Richard Henderson, 2021/06/29
- [PULL 25/63] target/cris: Use tcg_gen_lookup_and_goto_ptr, Richard Henderson, 2021/06/29
- [PULL 31/63] tcg: Add tcg_gen_vec_shl{shr}{sar}16i_i32, Richard Henderson, 2021/06/29
- [PULL 32/63] tcg: Add tcg_gen_vec_shl{shr}{sar}8i_i32, Richard Henderson, 2021/06/29
- [PULL 28/63] target/cris: Do not exit tb for X_FLAG changes, Richard Henderson, 2021/06/29
- [PULL 35/63] tcg: Add flags argument to bswap opcodes, Richard Henderson, 2021/06/29
- [PULL 34/63] tcg: Use correct trap number for page faults on *BSD systems,
Richard Henderson <=
- [PULL 16/63] target/cris: Mark exceptions as DISAS_NORETURN, Richard Henderson, 2021/06/29
- [PULL 36/63] tcg/i386: Support bswap flags, Richard Henderson, 2021/06/29
- [PULL 38/63] tcg/aarch64: Support bswap flags, Richard Henderson, 2021/06/29
- [PULL 39/63] tcg/arm: Support bswap flags, Richard Henderson, 2021/06/29
- [PULL 33/63] tcg: Implement tcg_gen_vec_add{sub}32_tl, Richard Henderson, 2021/06/29
- [PULL 37/63] tcg/aarch64: Merge tcg_out_rev{16,32,64}, Richard Henderson, 2021/06/29
- [PULL 40/63] tcg/ppc: Split out tcg_out_ext{8,16,32}s, Richard Henderson, 2021/06/29
- [PULL 41/63] tcg/ppc: Split out tcg_out_sari{32,64}, Richard Henderson, 2021/06/29
- [PULL 45/63] tcg/ppc: Support bswap flags, Richard Henderson, 2021/06/29
- [PULL 42/63] tcg/ppc: Split out tcg_out_bswap16, Richard Henderson, 2021/06/29