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[PATCH 3/6] target/microblaze: Assert transaction failures have exceptio
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled |
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Date: |
Thu, 3 Jun 2021 11:03:07 +0200 |
If exceptions are disabled, we must not get a transaction failure.
Assert they are enabled passed that point.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/microblaze/op_helper.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index 8d20522ee88..1048e656e27 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -122,9 +122,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr
physaddr, vaddr addr,
access_type == MMU_INST_FETCH ? "INST_FETCH" :
(access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE"));
- if (!(env->msr & MSR_EE)) {
- return;
- }
+ assert(env->msr & MSR_EE);
if (access_type == MMU_INST_FETCH) {
if (!cpu->cfg.iopb_bus_exception) {
--
2.26.3
- [PATCH 0/6] target/microblaze: Clean up MMU translation failed path, Philippe Mathieu-Daudé, 2021/06/03
- [PATCH 1/6] target/microblaze: Use the IEC binary prefix definitions, Philippe Mathieu-Daudé, 2021/06/03
- [PATCH 2/6] target/microblaze: Extract FPU helpers to fpu_helper.c, Philippe Mathieu-Daudé, 2021/06/03
- [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled,
Philippe Mathieu-Daudé <=
- [PATCH 4/6] target/microblaze: Fix Exception Status Register 'Cause' definitions, Philippe Mathieu-Daudé, 2021/06/03
- [PATCH 5/6] target/microblaze: Replace magic values by proper definitions, Philippe Mathieu-Daudé, 2021/06/03
- [PATCH 6/6] target/microblaze: Set OPB bits in tlb_fill, not in transaction_failed, Philippe Mathieu-Daudé, 2021/06/03