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[PATCH v6 01/14] target/ppc: Introduce macros to check isa extensions
From: |
matheus . ferst |
Subject: |
[PATCH v6 01/14] target/ppc: Introduce macros to check isa extensions |
Date: |
Tue, 1 Jun 2021 16:35:15 -0300 |
From: Richard Henderson <richard.henderson@linaro.org>
These will be used by the decodetree trans_* functions
to early-exit when the instruction set is not enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/translate.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index e16a2721e2..11fd3342a0 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7664,6 +7664,32 @@ static inline void set_avr64(int regno, TCGv_i64 src,
bool high)
tcg_gen_st_i64(src, cpu_env, avr64_offset(regno, high));
}
+/*
+ * Helpers for trans_* functions to check for specific insns flags.
+ * Use token pasting to ensure that we use the proper flag with the
+ * proper variable.
+ */
+#define REQUIRE_INSNS_FLAGS(CTX, NAME) \
+ do { \
+ if (((CTX)->insns_flags & PPC_##NAME) == 0) { \
+ return false; \
+ } \
+ } while (0)
+
+#define REQUIRE_INSNS_FLAGS2(CTX, NAME) \
+ do { \
+ if (((CTX)->insns_flags2 & PPC2_##NAME) == 0) { \
+ return false; \
+ } \
+ } while (0)
+
+/* Then special-case the check for 64-bit so that we elide code for ppc32. */
+#if TARGET_LONG_BITS == 32
+# define REQUIRE_64BIT(CTX) return false
+#else
+# define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B)
+#endif
+
#include "translate/fp-impl.c.inc"
#include "translate/vmx-impl.c.inc"
--
2.25.1
- [PATCH v6 00/14] Base for adding PowerPC 64-bit instructions, matheus . ferst, 2021/06/01
- [PATCH v6 01/14] target/ppc: Introduce macros to check isa extensions,
matheus . ferst <=
- [PATCH v6 02/14] target/ppc: Move page crossing check to ppc_tr_translate_insn, matheus . ferst, 2021/06/01
- [PATCH v6 03/14] target/ppc: Add infrastructure for prefixed insns, matheus . ferst, 2021/06/01
- [PATCH v6 04/14] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, matheus . ferst, 2021/06/01
- [PATCH v6 05/14] target/ppc: Implement PNOP, matheus . ferst, 2021/06/01
- [PATCH v6 06/14] target/ppc: Move D/DS/X-form integer loads to decodetree, matheus . ferst, 2021/06/01
- [PATCH v6 07/14] target/ppc: Implement prefixed integer load instructions, matheus . ferst, 2021/06/01
- [PATCH v6 08/14] target/ppc: Move D/DS/X-form integer stores to decodetree, matheus . ferst, 2021/06/01
- [PATCH v6 09/14] target/ppc: Implement prefixed integer store instructions, matheus . ferst, 2021/06/01
- [PATCH v6 10/14] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions, matheus . ferst, 2021/06/01
- [PATCH v6 11/14] target/ppc: Implement cfuged instruction, matheus . ferst, 2021/06/01