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[PATCH v4 5/5] target/ppc: isolated cpu init from translation logic
From: |
Bruno Larsen (billionai) |
Subject: |
[PATCH v4 5/5] target/ppc: isolated cpu init from translation logic |
Date: |
Tue, 4 May 2021 11:01:57 -0300 |
finished isolation of CPU initialization logic from
translation logic. CPU initialization now only has common code
and may or may not call accelerator-specific code, as the
build options require.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/{translate_init.c.inc => cpu_init.c} | 6 ++++++
target/ppc/meson.build | 1 +
target/ppc/spr_tcg.h | 2 ++
target/ppc/translate.c | 4 ++--
4 files changed, 11 insertions(+), 2 deletions(-)
rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c
similarity index 99%
rename from target/ppc/translate_init.c.inc
rename to target/ppc/cpu_init.c
index c913058170..0a1d67a98c 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/cpu_init.c
@@ -18,6 +18,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
+#include "qemu/osdep.h"
#include "disas/dis-asm.h"
#include "exec/gdbstub.h"
#include "kvm_ppc.h"
@@ -42,6 +43,11 @@
#include "fpu/softfloat.h"
#include "qapi/qapi-commands-machine-target.h"
+#include "exec/helper-proto.h"
+#include "helper_regs.h"
+#include "internal.h"
+#include "spr_tcg.h"
+
/* #define PPC_DEBUG_SPR */
/* #define USE_APPLE_GDB */
diff --git a/target/ppc/meson.build b/target/ppc/meson.build
index bbfef90e08..ad53629298 100644
--- a/target/ppc/meson.build
+++ b/target/ppc/meson.build
@@ -2,6 +2,7 @@ ppc_ss = ss.source_set()
ppc_ss.add(files(
'cpu-models.c',
'cpu.c',
+ 'cpu_init.c',
'dfp_helper.c',
'excp_helper.c',
'fpu_helper.c',
diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h
index 1d2890dea0..0be5f347d5 100644
--- a/target/ppc/spr_tcg.h
+++ b/target/ppc/spr_tcg.h
@@ -19,6 +19,8 @@
#ifndef SPR_TCG_H
#define SPR_TCG_H
+#define SPR_NOACCESS (&spr_noaccess)
+
/* prototypes for readers and writers for SPRs */
void spr_noaccess(DisasContext *ctx, int gprn, int sprn);
void spr_read_generic(DisasContext *ctx, int gprn, int sprn);
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 0c7628657b..7958f2f7da 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -38,6 +38,8 @@
#include "qemu/atomic128.h"
#include "spr_tcg.h"
+#include "qemu/qemu-print.h"
+#include "qapi/error.h"
#define CPU_SINGLE_STEP 0x1
#define CPU_BRANCH_STEP 0x2
@@ -381,7 +383,6 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn)
printf("ERROR: try to access SPR %d !\n", sprn);
#endif
}
-#define SPR_NOACCESS (&spr_noaccess)
/* #define PPC_DUMP_SPR_ACCESSES */
@@ -8617,7 +8618,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F,
0x03FFF800, \
};
#include "helper_regs.h"
-#include "translate_init.c.inc"
/*****************************************************************************/
/* Misc PowerPC helpers */
--
2.17.1
- [PATCH v4 1/5] target/ppc: Fold gen_*_xer into their callers, (continued)
- [PATCH v4 1/5] target/ppc: Fold gen_*_xer into their callers, Bruno Larsen (billionai), 2021/05/04
- [PATCH v4 2/5] target/ppc: renamed SPR registration functions, Bruno Larsen (billionai), 2021/05/04
- [PATCH v4 3/5] target/ppc: move SPR R/W callbacks to translate.c, Bruno Larsen (billionai), 2021/05/04
- [PATCH v4 4/5] target/ppc: turned SPR R/W callbacks not static, Bruno Larsen (billionai), 2021/05/04
- [PATCH v4 5/5] target/ppc: isolated cpu init from translation logic,
Bruno Larsen (billionai) <=
- Re: [PATCH v4 0/5] target/ppc: Untangle CPU init from translation, Fabiano Rosas, 2021/05/04