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[PULL 14/31] Hexagon (target/hexagon) change type of softfloat_roundingm
From: |
Richard Henderson |
Subject: |
[PULL 14/31] Hexagon (target/hexagon) change type of softfloat_roundingmodes |
Date: |
Sat, 1 May 2021 11:43:07 -0700 |
From: Taylor Simpson <tsimpson@quicinc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-10-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hexagon/arch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index 699e2cfb8f..bb51f19a3d 100644
--- a/target/hexagon/arch.c
+++ b/target/hexagon/arch.c
@@ -95,7 +95,7 @@ int32_t conv_round(int32_t a, int n)
/* Floating Point Stuff */
-static const int softfloat_roundingmodes[] = {
+static const FloatRoundMode softfloat_roundingmodes[] = {
float_round_nearest_even,
float_round_to_zero,
float_round_down,
--
2.25.1
- [PULL 06/31] Hexagon (target/hexagon) TCG generation cleanup, (continued)
- [PULL 06/31] Hexagon (target/hexagon) TCG generation cleanup, Richard Henderson, 2021/05/01
- [PULL 08/31] Hexagon (target/hexagon) remove unnecessary inline directives, Richard Henderson, 2021/05/01
- [PULL 09/31] Hexagon (target/hexagon) use env_archcpu and env_cpu, Richard Henderson, 2021/05/01
- [PULL 11/31] Hexagon (target/hexagon) decide if pred has been written at TCG gen time, Richard Henderson, 2021/05/01
- [PULL 12/31] Hexagon (target/hexagon) change variables from int to bool when appropriate, Richard Henderson, 2021/05/01
- [PULL 16/31] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn, Richard Henderson, 2021/05/01
- [PULL 07/31] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair, Richard Henderson, 2021/05/01
- [PULL 10/31] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN, Richard Henderson, 2021/05/01
- [PULL 13/31] Hexagon (target/hexagon) remove unused carry_from_add64 function, Richard Henderson, 2021/05/01
- [PULL 05/31] target/hexagon: remove unnecessary semicolons, Richard Henderson, 2021/05/01
- [PULL 14/31] Hexagon (target/hexagon) change type of softfloat_roundingmodes,
Richard Henderson <=
- [PULL 17/31] Hexagon (target/hexagon) use softfloat for float-to-int conversions, Richard Henderson, 2021/05/01
- [PULL 15/31] Hexagon (target/hexagon) use softfloat default NaN and tininess, Richard Henderson, 2021/05/01
- [PULL 18/31] Hexagon (target/hexagon) cleanup ternary operators in semantics, Richard Henderson, 2021/05/01
- [PULL 20/31] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h, Richard Henderson, 2021/05/01
- [PULL 26/31] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c, Richard Henderson, 2021/05/01
- [PULL 19/31] Hexagon (target/hexagon) cleanup reg_field_info definition, Richard Henderson, 2021/05/01
- [PULL 24/31] Hexagon (target/hexagon) add A5_ACS (vacsh), Richard Henderson, 2021/05/01
- [PULL 23/31] Hexagon (target/hexagon) add F2_sfinvsqrta, Richard Henderson, 2021/05/01
- [PULL 22/31] Hexagon (target/hexagon) add F2_sfrecipa instruction, Richard Henderson, 2021/05/01
- [PULL 30/31] Hexagon (target/hexagon) load into shifted register instructions, Richard Henderson, 2021/05/01