Re: [PATCH 09/38] target/riscv: SIMD 8-bit Compare Instructions

[Alistair Francis]

On Fri, Feb 12, 2021 at 10:22 AM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/helper.h                   |  6 ++++
>  target/riscv/insn32.decode              |  6 ++++
>  target/riscv/insn_trans/trans_rvp.c.inc |  7 ++++
>  target/riscv/packed_helper.c            | 46 +++++++++++++++++++++++++
>  4 files changed, 65 insertions(+)
>
> diff --git a/target/riscv/helper.h b/target/riscv/helper.h
> index f41f9acccc..4d9c36609c 100644
> --- a/target/riscv/helper.h
> +++ b/target/riscv/helper.h
> @@ -1208,3 +1208,9 @@ DEF_HELPER_3(scmplt16, tl, env, tl, tl)
>  DEF_HELPER_3(scmple16, tl, env, tl, tl)
>  DEF_HELPER_3(ucmplt16, tl, env, tl, tl)
>  DEF_HELPER_3(ucmple16, tl, env, tl, tl)
> +
> +DEF_HELPER_3(cmpeq8, tl, env, tl, tl)
> +DEF_HELPER_3(scmplt8, tl, env, tl, tl)
> +DEF_HELPER_3(scmple8, tl, env, tl, tl)
> +DEF_HELPER_3(ucmplt8, tl, env, tl, tl)
> +DEF_HELPER_3(ucmple8, tl, env, tl, tl)
> diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
> index f3cd508396..7519df7e20 100644
> --- a/target/riscv/insn32.decode
> +++ b/target/riscv/insn32.decode
> @@ -675,3 +675,9 @@ scmplt16   0000110  ..... ..... 000 ..... 1111111 @r
>  scmple16   0001110  ..... ..... 000 ..... 1111111 @r
>  ucmplt16   0010110  ..... ..... 000 ..... 1111111 @r
>  ucmple16   0011110  ..... ..... 000 ..... 1111111 @r
> +
> +cmpeq8     0100111  ..... ..... 000 ..... 1111111 @r
> +scmplt8    0000111  ..... ..... 000 ..... 1111111 @r
> +scmple8    0001111  ..... ..... 000 ..... 1111111 @r
> +ucmplt8    0010111  ..... ..... 000 ..... 1111111 @r
> +ucmple8    0011111  ..... ..... 000 ..... 1111111 @r
> diff --git a/target/riscv/insn_trans/trans_rvp.c.inc 
> b/target/riscv/insn_trans/trans_rvp.c.inc
> index 6438dfb776..6eb9e83c6f 100644
> --- a/target/riscv/insn_trans/trans_rvp.c.inc
> +++ b/target/riscv/insn_trans/trans_rvp.c.inc
> @@ -376,3 +376,10 @@ GEN_RVP_R_OOL(scmplt16);
>  GEN_RVP_R_OOL(scmple16);
>  GEN_RVP_R_OOL(ucmplt16);
>  GEN_RVP_R_OOL(ucmple16);
> +
> +/* SIMD 8-bit Compare Instructions */
> +GEN_RVP_R_OOL(cmpeq8);
> +GEN_RVP_R_OOL(scmplt8);
> +GEN_RVP_R_OOL(scmple8);
> +GEN_RVP_R_OOL(ucmplt8);
> +GEN_RVP_R_OOL(ucmple8);
> diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c
> index 30b916b5ad..ff86e015e4 100644
> --- a/target/riscv/packed_helper.c
> +++ b/target/riscv/packed_helper.c
> @@ -677,3 +677,49 @@ static inline void do_ucmple16(CPURISCVState *env, void 
> *vd, void *va,
>  }
>
>  RVPR(ucmple16, 1, 2);
> +
> +/* SIMD 8-bit Compare Instructions */
> +static inline void do_cmpeq8(CPURISCVState *env, void *vd, void *va,
> +                             void *vb, uint8_t i)
> +{
> +    uint8_t *d = vd, *a = va, *b = vb;
> +    d[i] = (a[i] == b[i]) ? 0xff : 0x0;
> +}
> +
> +RVPR(cmpeq8, 1, 1);
> +
> +static inline void do_scmplt8(CPURISCVState *env, void *vd, void *va,
> +                               void *vb, uint8_t i)
> +{
> +    int8_t *d = vd, *a = va, *b = vb;
> +    d[i] = (a[i] < b[i]) ? 0xff : 0x0;
> +}
> +
> +RVPR(scmplt8, 1, 1);
> +
> +static inline void do_scmple8(CPURISCVState *env, void *vd, void *va,
> +                               void *vb, uint8_t i)
> +{
> +    int8_t *d = vd, *a = va, *b = vb;
> +    d[i] = (a[i] <= b[i]) ? 0xff : 0x0;
> +}
> +
> +RVPR(scmple8, 1, 1);
> +
> +static inline void do_ucmplt8(CPURISCVState *env, void *vd, void *va,
> +                               void *vb, uint8_t i)
> +{
> +    uint8_t *d = vd, *a = va, *b = vb;
> +    d[i] = (a[i] < b[i]) ? 0xff : 0x0;
> +}
> +
> +RVPR(ucmplt8, 1, 1);
> +
> +static inline void do_ucmple8(CPURISCVState *env, void *vd, void *va,
> +                               void *vb, uint8_t i)
> +{
> +    uint8_t *d = vd, *a = va, *b = vb;
> +    d[i] = (a[i] <= b[i]) ? 0xff : 0x0;
> +}
> +
> +RVPR(ucmple8, 1, 1);
> --
> 2.17.1
>