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Re: [PATCH 11/38] target/riscv: SIMD 8-bit Multiply Instructions
From: |
Alistair Francis |
Subject: |
Re: [PATCH 11/38] target/riscv: SIMD 8-bit Multiply Instructions |
Date: |
Mon, 15 Mar 2021 17:33:33 -0400 |
On Fri, Feb 12, 2021 at 10:26 AM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/helper.h | 7 ++
> target/riscv/insn32.decode | 7 ++
> target/riscv/insn_trans/trans_rvp.c.inc | 8 +++
> target/riscv/packed_helper.c | 93 +++++++++++++++++++++++++
> 4 files changed, 115 insertions(+)
>
> diff --git a/target/riscv/helper.h b/target/riscv/helper.h
> index bc60712bd9..6bb601b436 100644
> --- a/target/riscv/helper.h
> +++ b/target/riscv/helper.h
> @@ -1221,3 +1221,10 @@ DEF_HELPER_3(umul16, i64, env, tl, tl)
> DEF_HELPER_3(umulx16, i64, env, tl, tl)
> DEF_HELPER_3(khm16, tl, env, tl, tl)
> DEF_HELPER_3(khmx16, tl, env, tl, tl)
> +
> +DEF_HELPER_3(smul8, i64, env, tl, tl)
> +DEF_HELPER_3(smulx8, i64, env, tl, tl)
> +DEF_HELPER_3(umul8, i64, env, tl, tl)
> +DEF_HELPER_3(umulx8, i64, env, tl, tl)
> +DEF_HELPER_3(khm8, tl, env, tl, tl)
> +DEF_HELPER_3(khmx8, tl, env, tl, tl)
> diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
> index 38519a477c..9d165efba9 100644
> --- a/target/riscv/insn32.decode
> +++ b/target/riscv/insn32.decode
> @@ -688,3 +688,10 @@ umul16 1011000 ..... ..... 000 ..... 1111111 @r
> umulx16 1011001 ..... ..... 000 ..... 1111111 @r
> khm16 1000011 ..... ..... 000 ..... 1111111 @r
> khmx16 1001011 ..... ..... 000 ..... 1111111 @r
> +
> +smul8 1010100 ..... ..... 000 ..... 1111111 @r
> +smulx8 1010101 ..... ..... 000 ..... 1111111 @r
> +umul8 1011100 ..... ..... 000 ..... 1111111 @r
> +umulx8 1011101 ..... ..... 000 ..... 1111111 @r
> +khm8 1000111 ..... ..... 000 ..... 1111111 @r
> +khmx8 1001111 ..... ..... 000 ..... 1111111 @r
> diff --git a/target/riscv/insn_trans/trans_rvp.c.inc
> b/target/riscv/insn_trans/trans_rvp.c.inc
> index 7e5bf9041d..336f3418b1 100644
> --- a/target/riscv/insn_trans/trans_rvp.c.inc
> +++ b/target/riscv/insn_trans/trans_rvp.c.inc
> @@ -436,3 +436,11 @@ GEN_RVP_R_D64_OOL(umul16);
> GEN_RVP_R_D64_OOL(umulx16);
> GEN_RVP_R_OOL(khm16);
> GEN_RVP_R_OOL(khmx16);
> +
> +/* SIMD 8-bit Multiply Instructions */
> +GEN_RVP_R_D64_OOL(smul8);
> +GEN_RVP_R_D64_OOL(smulx8);
> +GEN_RVP_R_D64_OOL(umul8);
> +GEN_RVP_R_D64_OOL(umulx8);
> +GEN_RVP_R_OOL(khm8);
> +GEN_RVP_R_OOL(khmx8);
> diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c
> index 13fed2c4d1..56baefeb8e 100644
> --- a/target/riscv/packed_helper.c
> +++ b/target/riscv/packed_helper.c
> @@ -827,3 +827,96 @@ static inline void do_khmx16(CPURISCVState *env, void
> *vd, void *va,
> }
>
> RVPR(khmx16, 2, 2);
> +
> +/* SIMD 8-bit Multiply Instructions */
> +static inline void do_smul8(CPURISCVState *env, void *vd, void *va, void *vb)
> +{
> + int16_t *d = vd;
> + int8_t *a = va, *b = vb;
> + d[H2(0)] = (int16_t)a[H1(0)] * b[H1(0)];
> + d[H2(1)] = (int16_t)a[H1(1)] * b[H1(1)];
> + d[H2(2)] = (int16_t)a[H1(2)] * b[H1(2)];
> + d[H2(3)] = (int16_t)a[H1(3)] * b[H1(3)];
> +}
> +
> +RVPR64(smul8);
> +
> +static inline void do_smulx8(CPURISCVState *env, void *vd, void *va, void
> *vb)
> +{
> + int16_t *d = vd;
> + int8_t *a = va, *b = vb;
> + d[H2(0)] = (int16_t)a[H1(0)] * b[H1(1)];
> + d[H2(1)] = (int16_t)a[H1(1)] * b[H1(0)];
> + d[H2(2)] = (int16_t)a[H1(2)] * b[H1(3)];
> + d[H2(3)] = (int16_t)a[H1(3)] * b[H1(2)];
> +}
> +
> +RVPR64(smulx8);
> +
> +static inline void do_umul8(CPURISCVState *env, void *vd, void *va, void *vb)
> +{
> + uint16_t *d = vd;
> + uint8_t *a = va, *b = vb;
> + d[H2(0)] = (uint16_t)a[H1(0)] * b[H1(0)];
> + d[H2(1)] = (uint16_t)a[H1(1)] * b[H1(1)];
> + d[H2(2)] = (uint16_t)a[H1(2)] * b[H1(2)];
> + d[H2(3)] = (uint16_t)a[H1(3)] * b[H1(3)];
> +}
> +
> +RVPR64(umul8);
> +
> +static inline void do_umulx8(CPURISCVState *env, void *vd, void *va, void
> *vb)
> +{
> + uint16_t *d = vd;
> + uint8_t *a = va, *b = vb;
> + d[H2(0)] = (uint16_t)a[H1(0)] * b[H1(1)];
> + d[H2(1)] = (uint16_t)a[H1(1)] * b[H1(0)];
> + d[H2(2)] = (uint16_t)a[H1(2)] * b[H1(3)];
> + d[H2(3)] = (uint16_t)a[H1(3)] * b[H1(2)];
> +}
> +
> +RVPR64(umulx8);
> +
> +static inline void do_khm8(CPURISCVState *env, void *vd, void *va,
> + void *vb, uint8_t i)
> +{
> + int8_t *d = vd, *a = va, *b = vb;
> +
> + if (a[i] == INT8_MIN && b[i] == INT8_MIN) {
> + env->vxsat = 1;
> + d[i] = INT8_MAX;
> + } else {
> + d[i] = (int16_t)a[i] * b[i] >> 7;
> + }
> +}
> +
> +RVPR(khm8, 1, 1);
> +
> +static inline void do_khmx8(CPURISCVState *env, void *vd, void *va,
> + void *vb, uint8_t i)
> +{
> + int8_t *d = vd, *a = va, *b = vb;
> + /*
> + * t[x] = ra.B[x] s* rb.B[y];
> + * rt.B[x] = SAT.Q7(t[x] s>> 7);
> + *
> + * (RV32: (x,y)=(3,2),(2,3),
> + * (1,0),(0,1),
> + * (RV64: (x,y)=(7,6),(6,7),(5,4),(4,5),
> + * (3,2),(2,3),(1,0),(0,1))
> + */
> + if (a[H1(i)] == INT8_MIN && b[H1(i + 1)] == INT8_MIN) {
> + env->vxsat = 1;
> + d[H1(i)] = INT8_MAX;
> + } else {
> + d[H1(i)] = (int16_t)a[H1(i)] * b[H1(i + 1)] >> 7;
> + }
> + if (a[H1(i + 1)] == INT8_MIN && b[H1(i)] == INT8_MIN) {
> + env->vxsat = 1;
> + d[H1(i + 1)] = INT8_MAX;
> + } else {
> + d[H1(i + 1)] = (int16_t)a[H1(i + 1)] * b[H1(i)] >> 7;
> + }
> +}
> +
> +RVPR(khmx8, 2, 1);
> --
> 2.17.1
>
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Alistair Francis <=