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Re: [PATCH 1/9] hw/block/pflash_cfi: Fix code style for checkpatch.pl


From: David Edmondson
Subject: Re: [PATCH 1/9] hw/block/pflash_cfi: Fix code style for checkpatch.pl
Date: Wed, 10 Mar 2021 09:30:01 +0000

On Wednesday, 2021-03-10 at 00:50:20 +01, Philippe Mathieu-Daudé wrote:

> We are going to move this code, fix its style first.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  hw/block/pflash_cfi01.c | 36 ++++++++++++++++++++++++------------
>  hw/block/pflash_cfi02.c |  9 ++++++---
>  2 files changed, 30 insertions(+), 15 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index 22287a1522e..b6919bbe474 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -115,7 +115,8 @@ static const VMStateDescription vmstate_pflash = {
>      }
>  };
>  
> -/* Perform a CFI query based on the bank width of the flash.
> +/*
> + * Perform a CFI query based on the bank width of the flash.
>   * If this code is called we know we have a device_width set for
>   * this flash.
>   */
> @@ -125,7 +126,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr 
> offset)
>      uint32_t resp = 0;
>      hwaddr boff;
>  
> -    /* Adjust incoming offset to match expected device-width
> +    /*
> +     * Adjust incoming offset to match expected device-width
>       * addressing. CFI query addresses are always specified in terms of
>       * the maximum supported width of the device.  This means that x8
>       * devices and x8/x16 devices in x8 mode behave differently.  For
> @@ -141,7 +143,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr 
> offset)
>      if (boff >= sizeof(pfl->cfi_table)) {
>          return 0;
>      }
> -    /* Now we will construct the CFI response generated by a single
> +    /*
> +     * Now we will construct the CFI response generated by a single
>       * device, then replicate that for all devices that make up the
>       * bus.  For wide parts used in x8 mode, CFI query responses
>       * are different than native byte-wide parts.
> @@ -185,7 +188,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, 
> hwaddr offset)
>      uint32_t resp;
>      hwaddr boff;
>  
> -    /* Adjust incoming offset to match expected device-width
> +    /*
> +     * Adjust incoming offset to match expected device-width
>       * addressing. Device ID read addresses are always specified in
>       * terms of the maximum supported width of the device.  This means
>       * that x8 devices and x8/x16 devices in x8 mode behave
> @@ -198,7 +202,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, 
> hwaddr offset)
>      boff = offset >> (ctz32(pfl->bank_width) +
>                        ctz32(pfl->max_device_width) - 
> ctz32(pfl->device_width));
>  
> -    /* Mask off upper bits which may be used in to query block
> +    /*
> +     * Mask off upper bits which may be used in to query block
>       * or sector lock status at other addresses.
>       * Offsets 2/3 are block lock status, is not emulated.
>       */
> @@ -297,7 +302,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr 
> offset,
>      case 0x60: /* Block /un)lock */
>      case 0x70: /* Status Register */
>      case 0xe8: /* Write block */
> -        /* Status register read.  Return status from each device in
> +        /*
> +         * Status register read.  Return status from each device in
>           * bank.
>           */
>          ret = pfl->status;
> @@ -308,7 +314,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr 
> offset,
>                  shift += pfl->device_width * 8;
>              }
>          } else if (!pfl->device_width && width > 2) {
> -            /* Handle 32 bit flash cases where device width is not
> +            /*
> +             * Handle 32 bit flash cases where device width is not
>               * set. (Existing behavior before device width added.)
>               */
>              ret |= pfl->status << 16;
> @@ -340,7 +347,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr 
> offset,
>                  break;
>              }
>          } else {
> -            /* If we have a read larger than the bank_width, combine multiple
> +            /*
> +             * If we have a read larger than the bank_width, combine multiple
>               * manufacturer/device ID queries into a single response.
>               */
>              int i;
> @@ -367,7 +375,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr 
> offset,
>                  ret = 0;
>              }
>          } else {
> -            /* If we have a read larger than the bank_width, combine multiple
> +            /*
> +             * If we have a read larger than the bank_width, combine multiple
>               * CFI queries into a single response.
>               */
>              int i;
> @@ -544,7 +553,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
>  
>              break;
>          case 0xe8:
> -            /* Mask writeblock size based on device width, or bank width if
> +            /*
> +             * Mask writeblock size based on device width, or bank width if
>               * device width not specified.
>               */
>              /* FIXME check @offset, @width */
> @@ -718,7 +728,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error 
> **errp)
>  
>      total_len = pfl->sector_len * pfl->nb_blocs;
>  
> -    /* These are only used to expose the parameters of each device
> +    /*
> +     * These are only used to expose the parameters of each device
>       * in the cfi_table[].
>       */
>      num_devices = pfl->device_width ? (pfl->bank_width / pfl->device_width) 
> : 1;
> @@ -763,7 +774,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error 
> **errp)
>          }
>      }
>  
> -    /* Default to devices being used at their maximum device width. This was
> +    /*
> +     * Default to devices being used at their maximum device width. This was
>       * assumed before the device_width support was added.
>       */
>      if (!pfl->max_device_width) {
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index 7962cff7455..fa981465e12 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -100,7 +100,8 @@ struct PFlashCFI02 {
>      uint16_t unlock_addr1;
>      uint8_t cfi_table[0x4d];
>      QEMUTimer timer;
> -    /* The device replicates the flash memory across its memory space.  
> Emulate
> +    /*
> +     * The device replicates the flash memory across its memory space.  
> Emulate
>       * that by having a container (.mem) filled with an array of aliases
>       * (.mem_mappings) pointing to the flash memory (.orig_mem).
>       */
> @@ -884,8 +885,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error 
> **errp)
>      pfl->cfi_table[0x28] = 0x02;
>      pfl->cfi_table[0x29] = 0x00;
>      /* Max number of bytes in multi-bytes write */
> -    /* XXX: disable buffered write as it's not supported */
> -    //    pfl->cfi_table[0x2A] = 0x05;
> +    /*
> +     * XXX: disable buffered write as it's not supported
> +     * pfl->cfi_table[0x2A] = 0x05;
> +     */
>      pfl->cfi_table[0x2A] = 0x00;
>      pfl->cfi_table[0x2B] = 0x00;
>      /* Number of erase block regions */
> -- 
> 2.26.2

dme.
-- 
You're like my yo-yo, that glowed in the dark.



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