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Re: [RFC v2 12/15] target/riscv: rvb: generalized or-combine
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From: |
Richard Henderson |
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Subject: |
Re: [RFC v2 12/15] target/riscv: rvb: generalized or-combine |
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Date: |
Wed, 16 Dec 2020 12:15:05 -0600 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 12/15/20 8:01 PM, frank.chang@sifive.com wrote:
> +static bool trans_gorci(DisasContext *ctx, arg_gorci *a)
> +{
> + REQUIRE_EXT(ctx, RVB);
> +
> + if (a->shamt >= TARGET_LONG_BITS) {
> + return false;
> + }
Check should be in gen_shifti.
> +static bool trans_gorciw(DisasContext *ctx, arg_gorciw *a)
> +{
> + REQUIRE_EXT(ctx, RVB);
> +
> + if (a->shamt >= 32) {
> + return false;
> + }
Check is unnecessary due to @sh5.
> +static void gen_gorcw(TCGv ret, TCGv arg1, TCGv arg2)
> +{
> + tcg_gen_ext32u_tl(arg1, arg1);
> + gen_helper_gorc(ret, arg1, arg2);
> +}
Calling the wrong helper. The zero-extension should be unnecessary -- the high
bits will be overridden by the sign-extension at the end of gen_shiftw.
r~
- Re: [RFC v2 06/15] target/riscv: rvb: min/max instructions, (continued)
- [RFC v2 07/15] target/riscv: rvb: sign-extend instructions, frank . chang, 2020/12/15
- [RFC v2 08/15] target/riscv: rvb: single-bit instructions, frank . chang, 2020/12/15
- [RFC v2 09/15] target/riscv: rvb: shift ones, frank . chang, 2020/12/15
- [RFC v2 10/15] target/riscv: rvb: rotate (left/right), frank . chang, 2020/12/15
- [RFC v2 12/15] target/riscv: rvb: generalized or-combine, frank . chang, 2020/12/15
- Re: [RFC v2 12/15] target/riscv: rvb: generalized or-combine,
Richard Henderson <=
- [RFC v2 13/15] target/riscv: rvb: address calculation, frank . chang, 2020/12/15
- [RFC v2 14/15] target/riscv: rvb: add/sub with postfix zero-extend, frank . chang, 2020/12/15
- [RFC v2 11/15] target/riscv: rvb: generalized reverse, frank . chang, 2020/12/15
- [RFC v2 15/15] target/riscv: rvb: support and turn on B-extension from command line, frank . chang, 2020/12/15