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Re: [PATCH v4 36/43] tcg/riscv: Support split-wx code generation
From: |
Alistair Francis |
Subject: |
Re: [PATCH v4 36/43] tcg/riscv: Support split-wx code generation |
Date: |
Tue, 15 Dec 2020 09:31:49 -0800 |
On Mon, Dec 14, 2020 at 6:13 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> tcg/riscv/tcg-target.h | 2 +-
> tcg/riscv/tcg-target.c.inc | 41 +++++++++++++++++++++-----------------
> 2 files changed, 24 insertions(+), 19 deletions(-)
>
> diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
> index 785fe37f9b..60b6a1a3fc 100644
> --- a/tcg/riscv/tcg-target.h
> +++ b/tcg/riscv/tcg-target.h
> @@ -170,6 +170,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t,
> uintptr_t, uintptr_t);
> #define TCG_TARGET_NEED_POOL_LABELS
>
> #define TCG_TARGET_HAS_MEMORY_BSWAP 0
> -#define TCG_TARGET_SUPPORT_MIRROR 0
> +#define TCG_TARGET_SUPPORT_MIRROR 1
>
> #endif
> diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
> index 02beb86977..5c1e0f8fc1 100644
> --- a/tcg/riscv/tcg-target.c.inc
> +++ b/tcg/riscv/tcg-target.c.inc
> @@ -425,41 +425,44 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int
> count)
> * Relocations
> */
>
> -static bool reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
> +static bool reloc_sbimm12(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
> {
> - intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
> + const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
> + intptr_t offset = (intptr_t)target - (intptr_t)src_rx;
>
> tcg_debug_assert((offset & 1) == 0);
> if (offset == sextreg(offset, 0, 12)) {
> - code_ptr[0] |= encode_sbimm12(offset);
> + *src_rw |= encode_sbimm12(offset);
> return true;
> }
>
> return false;
> }
>
> -static bool reloc_jimm20(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
> +static bool reloc_jimm20(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
> {
> - intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
> + const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
> + intptr_t offset = (intptr_t)target - (intptr_t)src_rx;
>
> tcg_debug_assert((offset & 1) == 0);
> if (offset == sextreg(offset, 0, 20)) {
> - code_ptr[0] |= encode_ujimm20(offset);
> + *src_rw |= encode_ujimm20(offset);
> return true;
> }
>
> return false;
> }
>
> -static bool reloc_call(tcg_insn_unit *code_ptr, const tcg_insn_unit *target)
> +static bool reloc_call(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
> {
> - intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
> + const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
> + intptr_t offset = (intptr_t)target - (intptr_t)src_rx;
> int32_t lo = sextreg(offset, 0, 12);
> int32_t hi = offset - lo;
>
> if (offset == hi + lo) {
> - code_ptr[0] |= encode_uimm20(hi);
> - code_ptr[1] |= encode_imm12(lo);
> + src_rw[0] |= encode_uimm20(hi);
> + src_rw[1] |= encode_imm12(lo);
> return true;
> }
>
> @@ -532,7 +535,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
> TCGReg rd,
> if (tmp == (int32_t)tmp) {
> tcg_out_opc_upper(s, OPC_AUIPC, rd, 0);
> tcg_out_opc_imm(s, OPC_ADDI, rd, rd, 0);
> - ret = reloc_call(s->code_ptr - 2, (tcg_insn_unit *)val);
> + ret = reloc_call(s->code_ptr - 2, (const tcg_insn_unit *)val);
> tcg_debug_assert(ret == true);
> return;
> }
> @@ -917,7 +920,7 @@ QEMU_BUILD_BUG_ON(TCG_TARGET_REG_BITS < TARGET_LONG_BITS);
> QEMU_BUILD_BUG_ON(TLB_MASK_TABLE_OFS(0) > 0);
> QEMU_BUILD_BUG_ON(TLB_MASK_TABLE_OFS(0) < -(1 << 11));
>
> -static void tcg_out_goto(TCGContext *s, tcg_insn_unit *target)
> +static void tcg_out_goto(TCGContext *s, const tcg_insn_unit *target)
> {
> tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, 0);
> bool ok = reloc_jimm20(s->code_ptr - 1, target);
> @@ -993,7 +996,8 @@ static void add_qemu_ldst_label(TCGContext *s, int is_ld,
> TCGMemOpIdx oi,
> label->datahi_reg = datahi;
> label->addrlo_reg = addrlo;
> label->addrhi_reg = addrhi;
> - label->raddr = raddr;
> + /* TODO: Cast goes away when all hosts converted */
> + label->raddr = (void *)tcg_splitwx_to_rx(raddr);
> label->label_ptr[0] = label_ptr[0];
> }
>
> @@ -1012,7 +1016,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s,
> TCGLabelQemuLdst *l)
> }
>
> /* resolve label address */
> - if (!reloc_sbimm12(l->label_ptr[0], s->code_ptr)) {
> + if (!reloc_sbimm12(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
> return false;
> }
>
> @@ -1046,7 +1050,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
> TCGLabelQemuLdst *l)
> }
>
> /* resolve label address */
> - if (!reloc_sbimm12(l->label_ptr[0], s->code_ptr)) {
> + if (!reloc_sbimm12(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
> return false;
> }
>
> @@ -1232,7 +1236,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
> *args, bool is_64)
> #endif
> }
>
> -static tcg_insn_unit *tb_ret_addr;
> +static const tcg_insn_unit *tb_ret_addr;
>
> static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> const TCGArg *args, const int *const_args)
> @@ -1780,11 +1784,12 @@ static void tcg_target_qemu_prologue(TCGContext *s)
> tcg_out_opc_imm(s, OPC_JALR, TCG_REG_ZERO, tcg_target_call_iarg_regs[1],
> 0);
>
> /* Return path for goto_ptr. Set return value to 0 */
> - tcg_code_gen_epilogue = s->code_ptr;
> + /* TODO: Cast goes away when all hosts converted */
> + tcg_code_gen_epilogue = (void *)tcg_splitwx_to_rx(s->code_ptr);
> tcg_out_mov(s, TCG_TYPE_REG, TCG_REG_A0, TCG_REG_ZERO);
>
> /* TB epilogue */
> - tb_ret_addr = s->code_ptr;
> + tb_ret_addr = tcg_splitwx_to_rx(s->code_ptr);
> for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
> tcg_out_ld(s, TCG_TYPE_REG, tcg_target_callee_save_regs[i],
> TCG_REG_SP, SAVE_OFS + i * REG_SIZE);
> --
> 2.25.1
>
>
- [PATCH v4 29/43] tcg/ppc: Support split-wx code generation, (continued)
- [PATCH v4 29/43] tcg/ppc: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 30/43] tcg/sparc: Use tcg_tbrel_diff, Richard Henderson, 2020/12/14
- [PATCH v4 26/43] tcg: Introduce tcg_tbrel_diff, Richard Henderson, 2020/12/14
- [PATCH v4 23/43] tcg/aarch64: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 31/43] tcg/sparc: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 32/43] tcg/s390: Use tcg_tbrel_diff, Richard Henderson, 2020/12/14
- [PATCH v4 33/43] tcg/s390: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 35/43] tcg/riscv: Remove branch-over-branch fallback, Richard Henderson, 2020/12/14
- [PATCH v4 36/43] tcg/riscv: Support split-wx code generation, Richard Henderson, 2020/12/14
- Re: [PATCH v4 36/43] tcg/riscv: Support split-wx code generation,
Alistair Francis <=
- [PATCH v4 37/43] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd, Richard Henderson, 2020/12/14
- [PATCH v4 42/43] tcg: Constify tcg_code_gen_epilogue, Richard Henderson, 2020/12/14
- [PATCH v4 38/43] tcg/mips: Do not assert on relocation overflow, Richard Henderson, 2020/12/14
- [PATCH v4 34/43] tcg/riscv: Fix branch range checks, Richard Henderson, 2020/12/14
- [PATCH v4 40/43] tcg/arm: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 39/43] tcg/mips: Support split-wx code generation, Richard Henderson, 2020/12/14
- [PATCH v4 41/43] tcg: Remove TCG_TARGET_SUPPORT_MIRROR, Richard Henderson, 2020/12/14
- [PATCH v4 43/43] tcg: Constify TCGLabelQemuLdst.raddr, Richard Henderson, 2020/12/14
- Re: [PATCH v4 00/43] Mirror map JIT memory for TCG, no-reply, 2020/12/14