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[PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSSta
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument |
Date: |
Sun, 13 Dec 2020 21:19:32 +0100 |
Introduce cpu_supports_isa() which takes a CPUMIPSState
argument, more useful at runtime when the CPU is created
(no need to call the extensive object_class_by_name()).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-3-f4bug@amsat.org>
---
target/mips/cpu.h | 1 +
target/mips/cpu.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 9c65c87bf99..e8bca75f237 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1287,6 +1287,7 @@ int cpu_mips_signal_handler(int host_signum, void *pinfo,
void *puc);
#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
bool cpu_type_supports_cps_smp(const char *cpu_type);
+bool cpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask);
bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 76d50b00b42..687e2680dd1 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -310,3 +310,8 @@ MIPSCPU *mips_cpu_create_with_clock(const char *cpu_type,
Clock *cpu_refclk)
return MIPS_CPU(cpu);
}
+
+bool cpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask)
+{
+ return (env->cpu_model->insn_flags & isa_mask) != 0;
+}
--
2.26.2
- [PULL 03/26] target/mips/kvm: Remove unused headers, (continued)
- [PULL 03/26] target/mips/kvm: Remove unused headers, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 04/26] target/mips: Include "exec/memattrs.h" in 'internal.h', Philippe Mathieu-Daudé, 2020/12/13
- [PULL 02/26] target/mips/kvm: Assert unreachable code is not used, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 06/26] target/mips: Do not include CP0 helpers in user-mode emulation, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 07/26] target/mips: Remove unused headers from cp0_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 08/26] target/mips: Also display exception names in user-mode, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 10/26] target/mips: Explicit Release 6 MMU types, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 11/26] target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument,
Philippe Mathieu-Daudé <=
- [PULL 13/26] hw/mips: Move address translation helpers to target/mips/, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 14/26] target/mips: Remove unused headers from translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 16/26] target/mips: Remove mips_def_t unused argument from mvp_init(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 17/26] target/mips: Introduce ase_mt_available() helper, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 18/26] target/mips: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 20/26] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 21/26] target/mips: Extract cpu_supports*/cpu_set* translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 22/26] target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c, Philippe Mathieu-Daudé, 2020/12/13