[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 13/26] hw/mips: Move address translation helpers to target/mips/
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 13/26] hw/mips: Move address translation helpers to target/mips/ |
Date: |
Sun, 13 Dec 2020 21:19:33 +0100 |
Address translation is an architectural thing (not hardware
related). Move the helpers from hw/ to target/.
As physical address and KVM are specific to system mode
emulation, restrict this file to softmmu, so it doesn't
get compiled for user-mode emulation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-2-f4bug@amsat.org>
---
include/hw/mips/cpudevs.h | 7 -------
target/mips/cpu.h | 8 ++++++++
hw/mips/boston.c | 1 -
{hw => target}/mips/addr.c | 2 +-
target/mips/translate.c | 2 --
hw/mips/meson.build | 2 +-
target/mips/meson.build | 1 +
7 files changed, 11 insertions(+), 12 deletions(-)
rename {hw => target}/mips/addr.c (98%)
diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
index 291f59281a0..f7c9728fa9f 100644
--- a/include/hw/mips/cpudevs.h
+++ b/include/hw/mips/cpudevs.h
@@ -5,13 +5,6 @@
/* Definitions for MIPS CPU internal devices. */
-/* addr.c */
-uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
-uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
-uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
-bool mips_um_ksegs_enabled(void);
-void mips_um_ksegs_enable(void);
-
/* mips_int.c */
void cpu_mips_irq_init_cpu(MIPSCPU *cpu);
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index e8bca75f237..5d3b2a01c01 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1291,6 +1291,14 @@ bool cpu_supports_isa(const CPUMIPSState *env, uint64_t
isa_mask);
bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
+/* addr.c */
+uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
+uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+bool mips_um_ksegs_enabled(void);
+void mips_um_ksegs_enable(void);
+
/* mips_int.c */
void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 16467ea4752..c3b94c68e1b 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -28,7 +28,6 @@
#include "hw/loader.h"
#include "hw/loader-fit.h"
#include "hw/mips/cps.h"
-#include "hw/mips/cpudevs.h"
#include "hw/pci-host/xilinx-pcie.h"
#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
diff --git a/hw/mips/addr.c b/target/mips/addr.c
similarity index 98%
rename from hw/mips/addr.c
rename to target/mips/addr.c
index 2f138fe1ea8..27a6036c451 100644
--- a/hw/mips/addr.c
+++ b/target/mips/addr.c
@@ -21,7 +21,7 @@
*/
#include "qemu/osdep.h"
-#include "hw/mips/cpudevs.h"
+#include "cpu.h"
static int mips_um_ksegs;
diff --git a/target/mips/translate.c b/target/mips/translate.c
index b8ed16bb779..4a1ae73f9d0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28,8 +28,6 @@
#include "exec/exec-all.h"
#include "tcg/tcg-op.h"
#include "exec/cpu_ldst.h"
-#include "hw/mips/cpudevs.h"
-
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
#include "hw/semihosting/semihost.h"
diff --git a/hw/mips/meson.build b/hw/mips/meson.build
index bcdf96be69f..77b4d8f365e 100644
--- a/hw/mips/meson.build
+++ b/hw/mips/meson.build
@@ -1,5 +1,5 @@
mips_ss = ss.source_set()
-mips_ss.add(files('addr.c', 'mips_int.c'))
+mips_ss.add(files('mips_int.c'))
mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))
mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c'))
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 681a5524c0e..4179395a8ea 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -14,6 +14,7 @@
mips_softmmu_ss = ss.source_set()
mips_softmmu_ss.add(files(
+ 'addr.c',
'cp0_helper.c',
'cp0_timer.c',
'machine.c',
--
2.26.2
- [PULL 04/26] target/mips: Include "exec/memattrs.h" in 'internal.h', (continued)
- [PULL 04/26] target/mips: Include "exec/memattrs.h" in 'internal.h', Philippe Mathieu-Daudé, 2020/12/13
- [PULL 02/26] target/mips/kvm: Assert unreachable code is not used, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 06/26] target/mips: Do not include CP0 helpers in user-mode emulation, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 07/26] target/mips: Remove unused headers from cp0_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 08/26] target/mips: Also display exception names in user-mode, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 10/26] target/mips: Explicit Release 6 MMU types, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 11/26] target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 13/26] hw/mips: Move address translation helpers to target/mips/,
Philippe Mathieu-Daudé <=
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 14/26] target/mips: Remove unused headers from translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 16/26] target/mips: Remove mips_def_t unused argument from mvp_init(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 17/26] target/mips: Introduce ase_mt_available() helper, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 18/26] target/mips: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 19/26] hw/mips/malta: Do not initialize MT registers if MT ASE absent, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 20/26] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 21/26] target/mips: Extract cpu_supports*/cpu_set* translate.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 22/26] target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 23/26] target/mips: Move cpu definitions, reset() and realize() to cpu.c, Philippe Mathieu-Daudé, 2020/12/13