Re: [PATCH] target/openrisc: fix icount handling for timer instructions

[Pavel Dovgalyuk]

On 06.11.2020 00:39, Richard Henderson wrote:
> On 11/5/20 3:54 AM, Pavel Dovgalyuk wrote:
> > This patch adds icount handling to mfspr/mtspr instructions
> > that may deal with hardware timers.
> >
> > Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
> > ---
> >   target/openrisc/translate.c |   15 +++++++++++++++
> >   1 file changed, 15 insertions(+)
>
> Looks correct, but it would be better not to duplicate the code from
> trans_l_mtspr, and use an is_jmp code (called DISAS_UPDATE_EXIT in some other
> targets).

mtspr includes the following comment:
* Save all of the cpu state first, allowing it to be overwritten.

Does it mean, that helper can overwrite the PC? Then the PC can't be 
updated in is_jmp handler at the end of instruction translation.


Pavel Dovgalyuk