[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 6/7] hw/mips/malta: Verify malta-phys machine uses correct DIMM s
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 6/7] hw/mips/malta: Verify malta-phys machine uses correct DIMM sizes |
Date: |
Tue, 30 Jun 2020 10:13:21 +0200 |
The machine has 4 DIMM slots. Each DIMM must be a power of 2.
Add a check the total RAM is a good combination of DIMMs.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/mips/malta.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 013bf9272c..5768b88183 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -71,6 +71,8 @@
#define MAX_IDE_BUS 2
+#define DIMM_SLOTS_COUNT 4
+
#define TYPE_MALTA_MACHINE MACHINE_TYPE_NAME("malta")
#define MALTA_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(MaltaMachineClass, (klass), TYPE_MALTA_MACHINE)
@@ -82,6 +84,7 @@ typedef struct MaltaMachineClass {
MachineClass parent_obj;
/* Public */
ram_addr_t max_ramsize;
+ bool verify_dimm_sizes;
} MaltaMachineClass;
typedef struct {
@@ -1260,6 +1263,12 @@ void mips_malta_init(MachineState *machine)
/* create CPU */
mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);
+ if (mmc->verify_dimm_sizes && ctpop64(ram_size) > DIMM_SLOTS_COUNT) {
+ error_report("RAM size must be the combination of %d powers of 2",
+ DIMM_SLOTS_COUNT);
+ exit(1);
+ }
+
/*
* The GT-64120A north bridge accepts at most 256 MiB per SCS for
* address decoding, so we have a maximum of 1 GiB. We deliberately
@@ -1494,6 +1503,7 @@ static void malta_machine_phys_class_init(ObjectClass
*oc, void *data)
#endif
mc->default_ram_size = 32 * MiB;
mmc->max_ramsize = 256 * MiB; /* 32 MByte PC100 SDRAM DIMMs x 4 slots */
+ mmc->verify_dimm_sizes = true;
};
static const TypeInfo malta_machine_types[] = {
--
2.21.3
- [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 3/7] hw/mips/malta: Rename 'malta' machine as 'malta-virt', Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 2/7] hw/mips/malta: Register the machine as a TypeInfo, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 1/7] hw/mips/malta: Trivial code movement, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 4/7] hw/mips/malta: Introduce MaltaMachineClass::max_ramsize, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 5/7] hw/mips/malta: Introduce the 'malta-phys' machine, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 7/7] hw/mips/malta: Allow more than 2GB on 64-bit malta-virt, Philippe Mathieu-Daudé, 2020/06/30
- [PATCH 6/7] hw/mips/malta: Verify malta-phys machine uses correct DIMM sizes,
Philippe Mathieu-Daudé <=
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Aleksandar Markovic, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Aleksandar Markovic, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Aleksandar Markovic, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Aleksandar Markovic, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Philippe Mathieu-Daudé, 2020/06/30
- Re: [PATCH 0/7] hw/mips/malta: Rework to allow more than 2GB of RAM on 64-bit, Aleksandar Markovic, 2020/06/30