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[PATCH v8 06/45] target/arm: Add DISAS_UPDATE_NOCHAIN
From: |
Richard Henderson |
Subject: |
[PATCH v8 06/45] target/arm: Add DISAS_UPDATE_NOCHAIN |
Date: |
Tue, 23 Jun 2020 12:36:19 -0700 |
Add an option that writes back the PC, like DISAS_UPDATE_EXIT,
but does not exit back to the main loop.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.h | 2 ++
target/arm/translate-a64.c | 3 +++
target/arm/translate.c | 4 ++++
3 files changed, 9 insertions(+)
diff --git a/target/arm/translate.h b/target/arm/translate.h
index 6c01f47983..c6f9376000 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -173,6 +173,8 @@ static inline void disas_set_insn_syndrome(DisasContext *s,
uint32_t syn)
* return from cpu_tb_exec.
*/
#define DISAS_EXIT DISAS_TARGET_9
+/* CPU state was modified dynamically; no need to exit, but do not chain. */
+#define DISAS_UPDATE_NOCHAIN DISAS_TARGET_10
#ifdef TARGET_AARCH64
void a64_translate_init(void);
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 63029bbc59..b4bf4cce18 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14310,6 +14310,9 @@ static void aarch64_tr_tb_stop(DisasContextBase
*dcbase, CPUState *cpu)
case DISAS_EXIT:
tcg_gen_exit_tb(NULL, 0);
break;
+ case DISAS_UPDATE_NOCHAIN:
+ gen_a64_set_pc_im(dc->base.pc_next);
+ /* fall through */
case DISAS_JUMP:
tcg_gen_lookup_and_goto_ptr();
break;
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 45ea788370..00f94371a4 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9926,6 +9926,7 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cpu)
case DISAS_NEXT:
case DISAS_TOO_MANY:
case DISAS_UPDATE_EXIT:
+ case DISAS_UPDATE_NOCHAIN:
gen_set_pc_im(dc, dc->base.pc_next);
/* fall through */
default:
@@ -9949,6 +9950,9 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cpu)
case DISAS_TOO_MANY:
gen_goto_tb(dc, 1, dc->base.pc_next);
break;
+ case DISAS_UPDATE_NOCHAIN:
+ gen_set_pc_im(dc, dc->base.pc_next);
+ /* fall through */
case DISAS_JUMP:
gen_goto_ptr();
break;
--
2.25.1
- [PATCH v8 00/45] target/arm: Implement ARMv8.5-MemTag, system mode, Richard Henderson, 2020/06/23
- [PATCH v8 02/45] target/arm: Improve masking of SCR RES0 bits, Richard Henderson, 2020/06/23
- [PATCH v8 03/45] target/arm: Add support for MTE to SCTLR_ELx, Richard Henderson, 2020/06/23
- [PATCH v8 01/45] target/arm: Add isar tests for mte, Richard Henderson, 2020/06/23
- [PATCH v8 04/45] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3, Richard Henderson, 2020/06/23
- [PATCH v8 05/45] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT, Richard Henderson, 2020/06/23
- [PATCH v8 06/45] target/arm: Add DISAS_UPDATE_NOCHAIN,
Richard Henderson <=
- [PATCH v8 07/45] target/arm: Add MTE system registers, Richard Henderson, 2020/06/23
- [PATCH v8 08/45] target/arm: Add MTE bits to tb_flags, Richard Henderson, 2020/06/23
- [PATCH v8 09/45] target/arm: Implement the IRG instruction, Richard Henderson, 2020/06/23
- [PATCH v8 10/45] target/arm: Revise decoding for disas_add_sub_imm, Richard Henderson, 2020/06/23
- [PATCH v8 11/45] target/arm: Implement the ADDG, SUBG instructions, Richard Henderson, 2020/06/23
- [PATCH v8 12/45] target/arm: Implement the GMI instruction, Richard Henderson, 2020/06/23
- [PATCH v8 13/45] target/arm: Implement the SUBP instruction, Richard Henderson, 2020/06/23
- [PATCH v8 14/45] target/arm: Define arm_cpu_do_unaligned_access for user-only, Richard Henderson, 2020/06/23