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Re: [PATCH v5 23/60] target/riscv: vector single-width saturating add an
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v5 23/60] target/riscv: vector single-width saturating add and subtract |
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Date: |
Sat, 14 Mar 2020 00:52:41 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +/* Vector Single-Width Saturating Add and Subtract */
> +GEN_OPIVV_GVEC_TRANS(vsaddu_vv, usadd)
> +GEN_OPIVV_GVEC_TRANS(vsadd_vv, ssadd)
> +GEN_OPIVV_GVEC_TRANS(vssubu_vv, ussub)
> +GEN_OPIVV_GVEC_TRANS(vssub_vv, sssub)
> +GEN_OPIVX_TRANS(vsaddu_vx, opivx_check)
> +GEN_OPIVX_TRANS(vsadd_vx, opivx_check)
> +GEN_OPIVX_TRANS(vssubu_vx, opivx_check)
> +GEN_OPIVX_TRANS(vssub_vx, opivx_check)
> +GEN_OPIVI_TRANS(vsaddu_vi, 1, vsaddu_vx, opivx_check)
> +GEN_OPIVI_TRANS(vsadd_vi, 0, vsadd_vx, opivx_check)
The vxsat bit can't be set by the gvec routines, at least on its own.
For ppc I compute the saturation bit by doing the vector saturating add, the
vector normal add, and comparing the two. See uses of vscr_sat.
But for now, you can just use your own current out-of-line functions.
r~
- Re: [PATCH v5 18/60] target/riscv: vector integer divide instructions, (continued)
- [PATCH v5 19/60] target/riscv: vector widening integer multiply instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 20/60] target/riscv: vector single-width integer multiply-add instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 21/60] target/riscv: vector widening integer multiply-add instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 22/60] target/riscv: vector integer merge and move instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 23/60] target/riscv: vector single-width saturating add and subtract, LIU Zhiwei, 2020/03/12
- Re: [PATCH v5 23/60] target/riscv: vector single-width saturating add and subtract,
Richard Henderson <=
- [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, LIU Zhiwei, 2020/03/12
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, Richard Henderson, 2020/03/14
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, Richard Henderson, 2020/03/14
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, LIU Zhiwei, 2020/03/14
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, Richard Henderson, 2020/03/14
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, LIU Zhiwei, 2020/03/15
- Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, Richard Henderson, 2020/03/15
[PATCH v5 25/60] target/riscv: vector single-width fractional multiply with rounding and saturation, LIU Zhiwei, 2020/03/12
[PATCH v5 26/60] target/riscv: vector widening saturating scaled multiply-add, LIU Zhiwei, 2020/03/12